Computer composition principle topic of floating-point operations
We set the original teacher is also very amazing. ppt serve, blog links out of. We all look ppt, ppt difficult to see classmates blog links. . . I look ignorant. . .
Really, I do not understand examples. . . Not a lie. . Then I deal with a concept of a concept. .
When a floating-point addition and subtraction operations required to complete the inspection operand 0, the order of the mantissa sum, normalization result, rounding process, the overflow processing step.
Here are some concepts:
double symbol bits: check in computing overflow. Is a double sign bit. 00 represents a positive number, 11 indicates a negative number.
If the most significant bit carry say causes the sign bit inconsistent.
Sign bit of the result, there are two 01 and 10.
When the sign bit of the result is 01: Overflow is
the result of the sign bit is 10:00: underflow is
what is what is overflow underflow:
Baidu explained very official. .
Overflow: when is a long data into the buffer, excess buffer is written to the higher, the higher the data may be stored in the buffer, a pointer, or the contents of other programs on the output of an instruction, the contents They are covered or destroyed. A small portion of the visible data or a set of instructions may cause an overflow of a program or operating system crash.
Underflow: is when a long data into the buffer, the lower the excess is written to the buffer, the lower buffer pointer is stored in the next instruction, the contents of the output or other programs.
The official explanation so let me learn Jike a very ignorant. . . (I may be Xueyibujing)
simple point:
when an underflow is close to 0 when the time is rounded to 0
when an overflow of a big number is approximated as positive infinity or negative infinity.
Examples of this example:
e.g. set X = + 1000001, Y = + 1000011, dual symbol indicates X = 00 1000001, Y = 00 1000011, [X + Y] = 01 0000100,01 complement arithmetic result of the positive overflow.
So when overflow occurs it?
When the number of the same two symbols are added (or subtracted distinct symbol number), the calculation result may overflow. Overflow detection mechanism used mainly binary decision sign bit and double judgment method.
Another example is when the number of symbols different subtraction:
provided x = 0.1101, y = -0.0111, symbol bits of the symbol bit double, find x-y complements
[x-y] Complement = [x] Complement + [- y] fill = 001,101 + 000,111 = 010,100 results wrong, positive spillover
Conventional floating-point representation:
N ^ = R & lt E M *
N floating point number, R is the substrate, E is the order codes, M being the mantissa.
For example: 
2 is R, the substrate, 010 is E, order code, 0.11011011 is M, the mantissa
When floating point subtraction operation using both complement form. Because the internal computers are employed complement form.
Deformation complement. Because the original code can not see positive negative.
Complement may identify positive and negative.
Here two symbol bits are used, the order code symbol bit double, double mantissa sign bit. (Said above)
1. step
is to order small yard into a large order code. Small Order line to the big stage.
The 1.1 * 1.2 * 2 ^ 2 ^ 3 and 4
is 1.1 * 2 ^ to 3, the mantissa is shifted to the right one. Exponent plus one.
For example:
Here's complement represented by:
exponent dual symbol bits represented by:
[X-] Floating = 00 is 010
[Y] Floating = 00100
mantissa dual symbol indicates:
[X-] Floating = 00.11011011
Y original code: 11.10101100
anti-Y, code: 11.01010011
the Y complement: 11.01010100
[the Y] = float 11.01010100
The order code Y:
here corresponds to a subtraction plus negative
[-Y] = the original 11,100
[-Y] 011 trans = 11
[-Y] = 11100 complement
we exponent of order. Is E = Ex - Ey = 00010 + 11 100 = 11 110
this complement conversion to obtain the original code: 11010
that is -2
so small exponent of X, the X stage two of the mantissa to the right, the X code plus 2
so [X] = 00100,00.00110110 float (11)
2. mantissa sum
if it is of subtractive, corresponding to the opposite number plus subtrahend. It is converted to the corresponding decreases in the opposite of the addition of complement to
3. normalized
into the right rules and regulations left
two different sign bit when the right rules . The situation is what I said above, in addition to the remaining 00 or 11 is the sign bit is not the same situation.
That is 01 ... and 10 ...
In both cases it right.
That is the right one 01 ... 001 ...
That is the right one 10 ... 110 ...
then order code plus 1
Two bits of the same symbol but with the highest value of the sign bit is left the same rules
in both cases and is 111 ... 000 ...
111 ... left a result of 11 ... 0
000 ... left a result of 00 ... 0
then subtracting the number of moves required order code.
Regulations require the above equation left
left an exponent minus 1
becomes:
1.00010101 (10)
order code minus 1
4. Rounding
Rounding rounding up 1 0 method, constant rounding method, a method is set
For example the formula 1 using the method of rounding 0
as
the most significant bit is a
need into 1
is:
If the most significant bit needs to be rounded down to 0, then lay down on it directly
5. Analyzing the overflow
sign rank code is not 00 or 01 overflow
only needs to determine whether the order code to overflow, the mantissa does not require determination overflow. But it is not currently a normalized number
to determine the order code Overflow way already mentioned above
01 for the overflow. Peugeot overflow counter
10 for the underflow. Set the operation result is 0, exponent and mantissa are 0
Well ~
This is the floating-point addition and subtraction operations friends -
if insufficient guidance and improved look ah ~
