X86 compilation recently learned, in fact, whether it is old or now 8086 i3 / 5/7/9, Xeon3 / 5, at the most basic principles are the same, but the number of bits CPU, address space, the number of registers, Extended instruction set and other aspects are different, for learning, 8086 timeless.
Branch instruction
1. Classification branch instruction:
(1) an unconditional branch instruction, such as: JMP
(2) conditional branch instruction
(3) loop instruction, such as: Loop
(. 4) Process
(5) Interrupt
Operator
1.offset
Interpretation: symbols processed by the compiler, the function is to obtain an offset address reference
start: mov ax, offset start; AX equivalent to MOV, 0
S: MOV AX, offset S; equivalent mov ax, 3
Advanced Instructions
1.jmp Instruction
Interpretation: unconditional transfer instructions, can only modify the IP, you can modify the CS and IP simultaneously.
: jmp instruction to be given two pieces of information
(1) is transferred to the destination address
(2) from the transfer (transfer time period, the transfer period is shorter, the near inner segment transfer)
JMP instruction 1) transferred according to the displacement:
JMP Short numeral (reference to the execution instruction)
JMP instruction format of this instruction is to achieve the transfer section, changes its IP range: -128 to 127, that is, when it is transferred forward up to 128 bytes, the after at most 127.
jmp near PTR numerals function: (the IP) = (the IP) + 16
2) of the transfer destination address jmp instruction in the instruction
jmp far ptr reference numeral, to achieve inter-segment transfer, also known as far transfer
(CS) = reference segment where the segment address, (IP) = offset address reference in the segment
far ptr indicates the command modifies CS and IP address with the segment address and offset the reference numeral
3) jmp instruction in the branch address register
instruction format : jmp bit 16 REG
. 4) transfer jmp instruction address in memory
jmp word ptr address of memory transfer (inner section); function: memory address from the storage unit starts a word, is the address of the branch destination offset
address of memory available any addressing mode Format given
jmp dword ptr address of memory (inter-segment transfer); functions: cell start address from the memory storage words, the high address word segment address is for the purpose of transfer, the low address is the address of the branch destination offset .
2.jcxz instruction
jcxz instruction is a conditional branch instruction, the conditional transfer instructions are all short transfer, comprising in a corresponding displacement of the transfer machine code instead of the destination address. Modifications are IP range: -128 to 127
instruction format: jcxz numeral
3.loop instruction
loop instruction is a loop instruction, the loop instructions are all short transfer, comprising in a corresponding displacement of the transfer machine code instead of the destination address. IP is to modify the range: -128 to 127.
Instruction format: loop numeral
3.call instructions
when executed call instruction, to perform two operations
(1) the current CS and IP IP or pushed onto the stack, (sp) = (sp) -2, ((ss) * 16 + (sp)) = IP
(2) transfer, (IP) = (IP) + 16
instruction format: call reference
of the call instruction short transfer can not be achieved, except that the same call and jmp principle.
call far ptr numerals; achieve inter-segment transfer
call 16 bit reg; branch address of the call instruction in a register
call word ptr address of memory; branch destination address of the call instruction in the memory unit of
call dword ptr address of memory; transfer address in memory unit the call instruction
4.ret instruction
ret instruction data stack, the content of IP, enabling transfer of nearly
instruction format: ret
5.retf instruction
retf instruction data stack, modify the contents of CS and IP, enabling cell transition
instruction format: retf
6.movsb instruction
to ds: si points to the memory cell of the byte into es: di, and then incremented or decremented according to the value of df
execute instructions equivalent movsb:
(. 1) ((ES) 16 + (DI)) = ( (DS) 16 + (Si))
(2) if df = 0 then the: (si) = (si) +1, (di) = (di) +1
If then the df = 1: (si) = (si) -1, (di) = (di ) -1
instruction format: movsb
related instructions: movsw, cld (df set to 0), std (df is set to 1)
7.pushf
flag register onto the stack
8.popf
pop data off the stack into the flag register
9.int instruction
haired interrupt process
instruction format: int n
execution:
(1) take the interrupt number n-
(2) flag register stack, the IF = 0, TF = 0
(. 3) the CS, the IP stack
(4) (IP ) = (n- . 4), (the CS) = (n- . 4 +2)
10.iret instruction
interrupt return
instruction format: iret
with the instructions and use int iret instructions, with the call and ret instructions use similar.
11.in instruction
read port
in al, 20h
12.out command
write port
out 20h, al
13.shl shr instruction and
shl left shift instruction, a right shift instruction shr
shl al, 1; the data left in an al
shr al, 1; the right of a data al