6, Timer 1

1, Timer Overview 1

　　1 is a typical support timer Timer / Counter independent 16-bit timer function, supporting input capture, output compare and PWM functions; timer has five separate capture / compare channels each to use a timer I / O pin, a timer for measuring and controlling a wide range of applications, a count-five channels available up / down mode allows the implementation of motor control applications

　　Timer Function 1 is as follows:

　　　　Five capture / compare channels
　　　　rising or falling edge of the input capture any
　　　　set, clear, or toggle output compare
　　　　free running mode or up-count / down counting operation
　　　　may be 1, 8 or clock divider 128 divides
　　　　generates an interrupt request on every capture / compare and terminal count
　　　　DMA trigger function

2, 16-bit counter

　　[About the frequency division clock} timer comprises a 16-bit counter, is incremented or decremented at each active clock edge, the active clock edge period by the register bits CLKCON.TICKSPD defined, it sets the global division of the system clock is provided from 0.25MHz to a different clock frequency of 32MHz tag ( use as a clock source of 32 MHz XOSC ); timer 1 in which a T1CTL.DIV further divided prescaler value set, the divider value from 1, 8 or 128, so when the 32 MHz crystal is used as the system clock source, a minimum clock frequency of the timer can be used are 1953.125Hz, the maximum is 32 MHz, when the oscillator is 16MHz RC as the system clock source, a timer may be used the maximum clock frequency is 16MHz

　　[] Value of current timer reading the counter can be used as a free-running counter, a modulo counter or a count up / down counter, the PWM for the center-aligned, 16-bit can be read by two 8-bit counter value SFR : T1CNTH  and T1CNTL , are contained in the high and low bytes, when read T1CNTL, counter high byte is buffered in T1CNTH time, so that high-order byte can be read from the T1CNTH, and therefore must T1CNTL first, always read before reading T1CNTH, all write access to the register T1CNTL 16-bit counter is reset when the count reaches a final value (overflow), the counter generates an interrupt request

　　[] Control timer can be used T1CTL  control register is set to start and stop the counter, when a value of 00 is not written to T1CTL.MODE, counter running, if 00 is written to T1CTL.MODE, the counter stops at its current value