Circuit design software is not hard to find. Commonly used circuit design software include PSPICE, EWB, ORCAD and PROTEL. You can choose a software that suits you based on the characteristics and applicable scope of the above four circuit design software. In this article, we will mainly explain the related content of ORCAD circuit design software. Are you ready with your notebook? It’s time to start the lecture!
Cadence 17.2 is a professional electronic design automation software. It is mainly used for high-end circuit design. It also has its own simulation tools. Its high-speed board design is regarded as an industrial standard in the industry, and many large companies Use it for electronic design. Because the cadence 17.2 cracked version has very obvious advantages in high-speed board production, it can simplify the complex production process and improve the efficiency of designers in designing drawings. There are also many people communicating and learning in major domestic forums. It can be said that Most computer motherboards and mobile phone motherboards on the market are designed with it.
The new version of Cadence 17.2 has undergone great changes and adopted a new data storage method. Therefore, the software after version 17 will no longer be compatible with drawings designed by previous versions. Fortunately, the newly added padstack creation method has greatly optimized the user's PCB design. Although old users may be a little uncomfortable with the design process, it is much more convenient in terms of design.
1. New features brought by Cadence SPB 17.2-2016 upgrade
1. The file version cannot be downgraded
That is, Cadence 17.2-2016 can open design files of version 16.x, but files saved in Cadence 17.2-2016 cannot be downgraded to version 16.x, so it is recommended to make a backup.
2、Cadence Download Manager
Use CadenceDownload Manager to automatically obtain software updates, download and install them automatically; users can also customize update plans through this tool;
3. Changes in the installation directory structure of related programs for Cadence OrCAD and Allegro products:
·The installation path of related applications for Cadence OrCAD and Allegro 17.2-2016 has been adjusted to /tools/bin in the installation path. Therefore, there is no need to define the paths of pcb/bin and fet/bin in the environment variable PATH. and execute
·Cadence OrCAD and Allegro 17.2-2016 related applications do not need to set the 17.2-2016 related paths in the environment variables.
·Cadence SPB Switch Release 17.2-2016 The version switching tool has been updated. It can identify the application paths between different versions and automatically update the application and file linkage relationships.
·If you use cmd console or batch file, please add your original batch program to allegro_cmd.bat in the /tools/bin folder path of the 17.2-2016 installation path.
·OrCAD Products supports TCL 8.6 64-bit version
4. Start menu
After installing the software, Cadence products are adjusted according to different categories in the Windows Start menu, making it easier to manage and find and start. I tried it, and it seems that the grouping function works in win7, but the grouping function does not work in win10, but it is even worse.
2. New features of OrCAD Capture 17.2-2016
1. Comparison of design differences
When there are differences between the two circuit diagrams, you can use the Capture Compare Design function to choose to compare the circuit diagram folder or the circuit diagram drawing page. The comparison results can check the differences in the logic or graphics of the circuit diagram.
In the Capture menu, select Tools >> Compare Designs function menu to compare the differences in the circuit diagrams.
2. Advanced part number arrangement function (Advanced Annotation)
An advanced part number arrangement function has been added to Capture. In this function, you can set different starting values of part numbers for different circuit diagram drawing pages, and you can also set different starting values for different parts of the same circuit diagram drawing page. Starting serial number.
3. Added personal working environment settings
OrCAD Capture now has a more advanced setting interface for user environment settings. Use Option >> Preference >> More Preference in the function menu to enter the setting interface. In the new Extended Preferences Setup, you can make advanced settings for the following environments:
·Command Shell
·Design and Libraries
·Design Cache
·Design Rule Check (DRC)
·OrCAD Capture CIS (CIS)
·Network Group (NetGroup)
·Netlist (NetList)
·Circuit diagram (Schematic)
4. Browse sample designs
In the Cadence 17.2-2016 software installation directory, more than 150 sample files are integrated and provided so that users can quickly understand and learn the design of OrCAD Capture, OrCAD Capture CIS and OrCAD Capture-OrCAD PSpice design processes. In OrCAD Capture 17.2-2016, you can simply open the built-in sample file through the function menu of File – Open – Demo Design.
5. Output and input of file formats
OrCAD Capture uses the File –> Export –> Design XML or Library XML command and the File –> Import –> Design XML or Library XML command, which can be accessed through <program installation directory>\tools\capture\tclscripts\capdb\dsn.xd , the olb.xd program outputs circuit diagrams and parts libraries into XML format, and reloads the XML format into standard circuit diagrams and parts libraries.
6. Intel Schematic Export Format (ISCF) format output
OrCAD Capture can use the File –> Export –> ISCF interface to export the Intel Schematic Export Format (ISCF) format for circuit diagram parts, pin attributes and ground signals. This format can set the output of parts or part pin attributes through the user interface. After output, these settings will be archived in the Caputre.ini file so that they do not need to be reset for next time use.
7. PDF output
Starting from OrCAD Capture 17.2-2016 version, if your computer has ghostscript 32 bit, ghostscript 64 bit, Adobe Acrobat Distiller... and other programs installed, you can use the File –> Export –> PDF function command to directly export the circuit diagram to a PDF document. Export content includes:
·OrCAD Capture design
·Display design hierarchy
·Display part number list
·Display the network and the pins of the components connected to it
·Can jump to the design within the hierarchical block
·Click a component to display its properties
·Navigation displays links to off-page connectors
8. OrCAD Capture design components
This component properties PDF document supports cross-probing functionality with OrCAD Capture PDF documents.
9. Add OrCAD PSpice simulation model to Capture –> PSpice design process
OrCAD Capture For the Capture -> PSpice design process, a new OrCAD PSpice simulation model is added, as shown in the table below.
10. New functions of other projects
For the circuit diagram Intersheet Reference function, the X-axis offset setting is added, and negative values can be set to set the offset position.
3. New features of OrCAD Capture CIS 17.2-2016
1. Crystal Report
OrCAD Capture CIS 17.2-2016 version defaults to use SQLite to connect to the database for ODBC connection to the database and Crystal Report.
The connection information is as follows:
DRIVER=SQLite3 ODBC Driver;Database=”SQLite DB file Name”;LongNames = 0;Timeout = 1000; NoTXN = 0;SyncPragma=NORMAL;StepAPI=0;NoWCHAR=1;
4. OrCad PSpice 17.2-2016 new features
1. PSpice DMI (Device Modeling Interface)Template Code generator
In PSpice 17.2-2016, you can use the DMI (Device Modeling Interface) Template Code generator of PSpice Model Editor to generate PSpice adapter code. The PSpice connection code uses the PSpice DMI DLL file when starting PSpice emulation. Add the model code of the analog/digital C/C++ and SystemC models to the PSpice connection code and use Microsoft Visual Studio Express 2013 to create the PSpice DMI DLL library. After the Spice DMI DLL library is generated, use the PSpice model editor to quickly create the OrCAD Capture component using its corresponding PSpice model (.lib), and then use this PSpice model in the PSpice design simulation process.
The PSpice DMI Template Code generator provides the following component types:
●Simulation basic components:
·Generic device
·Voltage-Controlled Voltage Source
·Function-Dependent Voltage Source
·Voltage-Controlled Current Source
·Function-Dependent Current Source
·Generic Two-Node Device
·Generic Three-Node Device
·Digital C/C++ basic components
·SystemC basic parts
·Verilog-A basic parts
2. Added delay function of behavioral simulation model
The DelayT() and DelayT1() functions simplify traditionally used delay functions, such as TLINE and Laplace functions, which reduce convergence problems and allow for faster calculations than traditional function signals (voltage or current).
The syntax of the –DelayT() function is delayt(v(x),, ) Example: E2 out 0 value {delayt(V(x),5m, 10m)}
The syntax of the –DelayT1() function is delayt1(v(x),) Example: E2 out 0 value {delayt1(V(x),5m)}
3. SKIPTOPO is added to the Flag option of the OPTIONS command.
When the Flag option is set to SKIP TOPO = 1, OrCAD Capture will skip topology checks.
Example: .options SKIPTOPO = 1
Supports the use of negative values in hysteresis voltage and threshold voltage
5. New features of OrCAD PCB Designer 17.2-2016
1. Brand new Padstack editor interface
The new Padstack Editor interface simplifies the unnecessary steps for setting up various Padstacks. Users only need to select the type and geometric shape to be created on the Start page, and then they can make relevant detailed settings on other pages.
2. Dynamic copper supports hierarchical definition
For dynamic copper Pin/Via connection and isolation settings, special definitions can be made hierarchically in the new version.
3. The following settings also support hierarchical settings:
Dyn_clearance_oversize_array Ÿ
Dyn_clearance_typeŸ
Dyn_fixed_therm_width_array ŸŸ
Dyn_max_thermal_connsŸ
Dyn_min_thermal_connsŸ
Dyn_oversize_therm_width_array ŸŸ
Dyn_thermal_best_fitŸ
Dyn_thermal_con_typeŸ
4. Brand new layered structure interface
The redesigned overlay editing settings make full use of the table format method to perform related settings. Its creativity comes from the format of the Constraint Manager, making it easier for users to operate through consistent tables.
The new interface integrates Unused Pad Suppression and Embedded Component settings and supports non-electrical layer components, such as: Solder mask, Paste, Coverlay... etc.; in addition, the character length of Material has also been extended to 250 characters.
5. Support multi-layer structure design of soft and hard combination boards
Rigid-flex board design corresponding to multi-layer structure can be set through Cross Section Editor.
6. Regional management of soft and hard boards
·Add new entity area to define the area range of soft board or hard board respectively.
·New Classes and Subclass types
·Add soft-hard board and surface treatment Class.
7. Added Design Outline and CUTOUTS subclasses
For Board Geometry, the subclasses of Design Outline and CUTOUTS have been added for wider application in the future.
8. Dynamic area placement
For soft-hard composite boards at different stacking levels, when placing parts, the parts can be placed on the correct level according to the area they belong to.
9. Added dynamic mesh copper
Dynamic Copper can now lay mesh copper directly.
10. Inter Layer Checks of software combination board
The soft-hard board design has different masks and surface coatings respectively, and there are also bending areas for the soft board parts. Therefore, relative inspections must be carried out to avoid design errors during production and assembly. Set relevant check conditions through Inter Layer Checks.
·Inspection of Pin and Via in the bending area
·Coverage check
·Production materials of rigid-soft board
·Cross section chart supports multi-structured tables
11. Dynamic teardrop copper setting
Dynamic Tear Drop Copper Replenishment can now be set for each level.
12. Added missing Tapered trace execution output report
The new report can output the missing gradient Tapered trace report.
13. Multiple editing command modes
In v16.6-2015, a new operation mode that can quickly edit Shape was added. In v17.2, the good operation and editing features are continued, and more diverse editing instructions are added.
14. Brand new Color Dialog
The presentation of data is an important part, so the new Color dialog will allow you to operate it in a faster and more efficient way.
15. New visual presentation
The new interface presents Layers/Nets/Display/Favorites/Visibility Pane in a tabbed format.
·You can quickly filter out the components you want to set through Filter.
·You can control the type of display objects and the layer settings of each stack display under multiple stacks.
6. User interface updates
1. Customizable toolbar
Provides more personalized custom toolbar properties, which can now turn more commands into an icon.
2. Display and hide settings of status bar
Now you can set the information you want to show or hide on the Status bar.
3. Acute angle detection
For acute angle inspection, the user can confirm the following four situations by defining the acute angle.
·Line to Pad
·Line to Shape
·Shape Edge to Edge
·Line to Line
4. Hole spacing inspection
Through the setting of Check holes within pads, regardless of whether the Hole has Pad or not, the check will be performed according to the spacing setting of the Hole in CM Spacing.
5. Maintain Padstacks definition
If there is Replace Padstack for part packaging in the design, you can choose whether to retain the Padstack name in the current design without being refreshed when Refresh Symbol.
6. Performance improvement
CPU performance increases by 10-20%.
Import logic handles conditions faster than ever for Devices with many Pins (>2k pins).
7. Character length increased
The name length of Default internal can be increased from the original 32 characters to 255 characters.