World Frontier Technology Development Report 2023 "World Information Technology Development Report" (4) Electronic Information Technology

Data comes from: "World Frontier Technology Development Report 2023" and the Internet

1 Overview

Electronic information technology is the underlying supporting technology of modern information technology. It has provided important support for the development of computing, communication and other technologies in the long-term development process. Continuous innovation in components and architecture drives the research and development of various practical devices. Technologies such as computers, artificial intelligence, and robots developed thereby are revolutionizing industries such as healthcare, transportation, and manufacturing, and are helping to improve process efficiency; high-speed Internet and The availability of mobile devices enables people to access rich information anytime and anywhere, improves the efficiency of communication and collaboration, and promotes social and cultural exchanges.

2. Microelectronics technology

Microelectronics plays a vital role in the development and advancement of many modern technologies. This technology aims to integrate electronic components and circuits onto small chips or microprocessors and can be used in a variety of devices and systems. The ability to integrate multiple components and circuits onto a single chip greatly improves the performance and reliability of electronic systems, while also reducing system size, weight and cost, and increasing performance and efficiency. This enables the development of complex and sophisticated systems, continuously expanding and enriching the application scenarios of various military and civilian information systems.

2.1 Fine process chips

In 2022, South Korea's Samsung Electronics and China's TSMC will achieve mass production of 3nm process technology chips, and 2nm process technology chips are also stepping up development. The continuous shrinkage of chip manufacturing processes has continuously improved the computing performance and efficiency of equipment, and made it smaller in size. It is expected to play a greater role in industry scenarios such as data centers, consumer electronics, and artificial intelligence.

2.1.1 China’s TSMC releases 2nm process details

TSMC announced its future advanced process roadmap at the North American Technology Forum and plans to mass-produce 2nm process chips in 2025. To this end, TSMC will introduce the most advanced and latest high numerical aperture extreme ultraviolet lithography machine from Dutch ASML (ASML) in 2024 for mass production of 2-nanometer process chips. TSMC’s 2nm process technology will use the Gate-All-Around Field Effect Transistors (GAAFET) architecture. At the same power consumption, the performance speed of 2nm chips is 10% to 15% higher than that of 3nm chips; at the same speed, the power consumption is reduced by 25% to 30%. TSMC stated that the 2nm process technology platform will cover high-performance versions and complete small chip integration solutions. Commercial 2nm chips are expected to be available by the end of 2025 or 2026.

2.1.2 Intel Corporation of the United States claims that chip transistor density will reach 10 times the current level in 2030

In August 2022, Pat Gelsinger, CEO of Intel Corporation in the United States, attended the Hotchips 2022 conference to look forward to future chip technology. Kissinger pointed out that advanced packaging technology will promote the development of Moore's Law and will develop advanced system on package (SoP) based on chiplets (Chiplet-Based). The connotation is that chip manufacturers no longer only provide a single Instead of wafer production, it provides complete system-level services, including wafer production, advanced packaging and integrated software technology. Kissinger pointed out that the current chip has a maximum of about 100 billion transistors, and with the development of SoP technology, the density of the chip will increase to 1 trillion transistors by 2030, which is 10 times the current level. To achieve this goal, Intel will abandon fin field effect transistor (FinFET) technology on the 20A process that will be mass-produced in 2024, and turn to next-generation technologies such as ribbon transistors (RibbonFET) and PowerVia. PowerVia is Intel's unique, industry-first backside power transmission network that optimizes signal transmission by eliminating the need for front-side power supply wiring on the wafer.

2.1.3 South Korea’s Samsung Electronics takes the lead in achieving mass production of 3nm process chips

In May 2022, South Korea's Samsung Electronics announced that it had officially begun mass production of 3-nanometer chips based on the all-around gate transistor (GAAFET) architecture, becoming the world's first company to mass-produce 3-nanometer chips. South Korea's Samsung Electronics said that compared with 5-nanometer chips, the performance of 3-nanometer chips has increased by 23%, power consumption has been reduced by 45%, and chip area has been reduced by 16%. The company will launch a second-generation 3-nanometer chip in 2023, which will reduce power consumption by 50%, improve performance by 30%, and reduce chip area by 35%.

2.1.4 Eight Japanese companies, including Toyota and Sony, jointly established a high-end chip company to produce chips with 2 nanometer and below processes.

In August 2022, 8 companies including Toyota Motor, Sony, Nippon Telecom and Telephone, Nippon Electric, Denso, Softbank, Kioxia and Bank of Tokyo-Mitsubishi UFJ, MUFG Bank Rapidus High-end Chip Company, a joint venture, will be established to produce next-generation semiconductor chips for supercomputers and artificial intelligence in Japan. The company will rely on the partnership between Japan and the United States and IBM's technology to strive to trial-produce 2-nanometer chips by 2025 and achieve large-scale mass production of chips with 2-nanometer and below processes in 2027. Japan's New Energy and Industrial Technology Development Organization (NEDO) has entrusted Rapidus to participate in the 5G communications advanced semiconductor manufacturing project.

2.1.5 China’s TSMC officially mass-produces 3nm process technology

In December 2022, TSMC started formal commercial mass production of 3-nanometer process chips at its Wafer Factory 18. The first phase of TSMC Wafer Factory 18 started construction in 2018. Previously, it mainly produced 5-nanometer process chips. With the commercial mass production of 3-nanometer chips, TSMC Wafer Factory 18 will become its main production base for advanced process technology in the future. In terms of 3-nanometer process technology, China's TSMC and South Korea's Samsung Electronics adopt different routes. South Korea's Samsung Electronics uses the all-around gate transistor (GAAFEET) architecture, while China's TSMC uses the Fin Field Effect Transistor (FinFET) architecture.

2.2 Special process

The demand for computing power in data centers and artificial intelligence has surged, placing higher requirements on the efficiency and energy consumption of computing equipment. To this end, major companies and research institutions around the world continue to explore new technologies and processes, seek new breakthroughs in materials, circuit design, manufacturing processes, etc., and pursue more optimized system integration, higher efficiency, and lower energy consumption.

2.2.1 Samsung releases the world’s first computer based on magnetoresistive random access memory

In January 2022, South Korea's Samsung Electronics released the world's first computer based on Magnetoresistive Random Access Memory (MRAM), which is expected to be used for artificial intelligence computing. Most current computers use independent memory chips and independent hard disk storage. In order to improve computing efficiency, the industry has been developing various non-volatile memories (NVM) including MRAM, taking into account the functions of hard disk and memory, supporting the new paradigm of computing in memory (CIM), and at the same time Helps significantly reduce power consumption. In order to achieve this goal, researchers have developed non-volatile memories such as Resistive Random Access Memory (RRAM) and Phase-Change Random Access Memory (PRAM), and Samsung developed it in a unique way Released MRAM memory computing chip prototype. Samsung's MRAM has the advantages of high speed, durability, and easy mass production.

2.2.2 Russia develops X-ray lithography machine

In April 2022, the National Research University of Electronic Technology (MIET) in Moscow, Russia, undertook an X-ray lithography machine development project assigned by the Ministry of Industry and Trade of the Russian Federation (Ministry of Industry and Trade of the Russian Federation). The Russian government will invest an initial phase of 670 million rubles (approximately US$9.16 million) in the project. The lithography machine developed by the project will reach the extreme ultraviolet lithography level, but the technical principles are completely different. X-ray lithography machine is a maskless X-ray lithography machine based on synchrotron or plasma source. The X-ray wavelength used is between 0.01 nanometers and 10 nanometers, which is shorter than extreme ultraviolet light, so its light The engraving resolution is higher than that of EUV lithography machines. In addition, compared with EUV lithography machines, X-ray lithography machines can directly perform photolithography operations without a photomask, and the cost is lower. Globally, China, the United States, and Europe have conducted X-ray lithography-related research, but there is no X-ray lithography machine that can achieve large-scale mass production. Russia has a solid foundation in technologies such as X-rays and plasma, so it has certain research and development capabilities.

2.2.3 The University of Tokyo in Japan has developed a three-dimensional vertical field effect transistor, which will lead to smaller and more environmentally friendly data memory

In June 2022, researchers at the Institute of Industrial Science, the University of Tokyo, Japan, developed a proof-of-concept 3D stacked memory cell based on ferroelectric and antiferroelectric field effect transistors. The transistor can store 1s and 0s in a non-volatile way, which means it does not need to be powered all the time; the vertical device structure increases information density and reduces computing energy requirements. In addition, by using antiferroelectrics instead of ferroelectrics, the memory cell requires only a small net charge to erase data, improving writing efficiency. Studies have confirmed that the device remains stable for at least 1,000 cycles. Researchers say new technology could significantly improve non-volatile memory and help develop

2.2.4 Chinese and American researchers achieve sub-0.5 nanometer dielectric and two-dimensional semiconductor integration

In October 2022, a joint research team from Peking University in China and the University of Texas at Austin (UT Austin) achieved the integration of sub-0.5 nanometer dielectrics and two-dimensional semiconductors. The researchers used a process called UV-assisted intercalation oxidation to synthesize the selenium-bismuth oxide two-dimensional material, which has a high dielectric constant, an ultra-flat lattice-matched interface and excellent insulation. After testing, this material's leakage current at a gate voltage of 1 volt is still at an ultra-low level when the equivalent oxide thickness is as low as 0.41 nanometers, meeting the industrial requirements for next-generation transistor dielectrics. This new material is expected to be used to develop ultra-thin high-k gate dielectrics in two-dimensional transistors and help achieve miniaturization of transistors.

2.3 Advanced packaging

As semiconductor front-end manufacturing nodes become more and more sophisticated and design costs increase rapidly, advanced packaging and its 2.5D and 3D solutions have emerged and become crucial and effective in reducing front-end manufacturing costs. At the same time, advanced packaging solutions have new high-performance protocols for data transmission that help improve system performance and provide lower latency, higher bandwidth and power efficiency.

2.3.1 IT giants such as Intel, Microsoft and TSMC established the Small Chip Interconnect Alliance

In March 2022, industry giants such as Intel, AMD, Qualcomm, Samsung, TSMC, Meta and Microsoft established the Small Chip Interconnect (UCIe) Standard Alliance. The original intention of the UCIe standard was to standardize chip interconnection through open source design, thereby reducing costs and promoting the formation of a broader ecosystem for verifying chips. This new interconnect standard will enable standardized connections between chiplets. The goal of the UCIe standard is to be as universal and universal as other connection standards such as USB, while providing excellent power and performance indicators for small chip connections, and will cover the X86 and ARM ecosystem.

2.3.2 Intel’s 3D packaging technology makes new progress

In June 2022, Intel developed a fully integrated voltage regulator (FIVR) with an embedded inductor in the packaging design, which is used to control the chip in the 3D Through Silicon Via (3D- TSV) power in a stacked system. Voltage controllers are critical for 3D packaging, enabling chiplet packaging at optimal process nodes based on workload. FIVR is implemented on a die based on a 22nm process, using three through silicon via (TSV) friendly inductor structures, with multiple trade-off options regarding area and efficiency.

2.3.3 South Korea’s Samsung Electronics established a semiconductor packaging division to strengthen cooperation with large foundry customers

In July 2022, South Korea's Samsung Electronics established the Semiconductor Packaging Division to strengthen cooperation with large foundry customers in the packaging field. The department, which is composed of test packaging engineers from Samsung's Device Solutions Division, members of the Semiconductor R&D Center, and personnel from the memory and foundry departments, will develop advanced packaging solutions to strengthen its determination to cooperate with its broad range of foundry customers. As the circuit miniaturization work of the front-end process reaches its limit, major chip manufacturers will compete more intensely on various advanced packaging processes. Currently, semiconductor giants such as Intel and TSMC are investing heavily in this field, especially 3D packaging and small chip technology.

2.3.4 Intel published a paper showing the technical details of the UCIe standard

In October 2022, Intel Corporation released "UCIe: An Open Industry Standard for Innovations with Chiplets at Package Level" (UCIe: An Open Industry Standard for Innovations with Chiplets at Package Level), which introduced the technical details of the chiplet interconnection standard. . UCIe is an open industry standard interconnect that provides in-chip package connections for heterogeneous chips to meet the needs of the entire computing system, allowing designers to package chips of different types and manufacturers to achieve high performance, Flexibility and interoperability goals. The paper introduces technical details in terms of small chip layered design, physical layer architecture, standard packaging channel design, advanced packaging channel design, etc., and analyzes the UCIe packaging channel performance test results, showing that the standard has high bandwidth, low latency, High power efficiency and cost-effective features.

2.3.5 The research team of Tokyo Institute of Technology in Japan has developed a new chip packaging technology that can effectively reduce integration complexity

In October 2022, a research team from Tokyo Institute of Technology in Japan developed a new chip packaging technology that meets the requirements for broadband inter-chip communication and scalable chip integration, and effectively reduces the complexity of integration. The research team designed a small chip silicon bridge interconnection structure to achieve broadband communication between chips through fine "micro-pillars" and used the Chip-Last process for integration. This new chip packaging structure can improve the high-frequency characteristics and heat dissipation performance of the chip's external wiring, and there is no yield problem during amplification and integration. In the future, this technology is expected to accelerate the evolution of semiconductor integration technology and further promote the development of chip miniaturization.

2.3.6 South Korea’s Samsung plans to use backside power supply network technology to develop 2nm chips, which can be developed on the backside of the wafer

In October 2022, South Korea's Samsung plans to use backside power supply network (BSPDN) technology to develop 2-nanometer chips. BSPDN technology transfers the power lines on the chip to the empty back side of the wafer, directly supplying power to the advanced microprocessor core chip through the thinned back side, thereby increasing the chip's transistor integration. Developing the backside of the wafer has become the third idea to increase chip transistor density after process indentation and 3D packaging.

3. Optoelectronics technology

Optoelectronics involves the generation, control and manipulation of light to enable computing, communication and sensing. Optical communication and optical computing have the characteristics of high speed and low loss, allowing faster and more efficient data transmission and computing with lower energy consumption. At present, new optical devices are being introduced and the integration of optoelectronic platforms is increasing day by day, continuously expanding their applications in fields such as high-speed communications, optical computing, and medical diagnosis.

3.1 US company OpenLight launches the world’s first open silicon photonics platform

In June 2022, OpenLight, a subsidiary of Synopsys in the United States, launched the world's first open silicon photonics platform with integrated lasers to meet the performance, power and reliability requirements of the growing silicon photonics market. Aveek Sarkar, vice president of engineering at Synopsys, said OpenLight is paving the way for a new generation of silicon photonics by enabling scalable integration of lasers in pluggable and co-packaged optical components. Synopsys' electronic and photonic design solutions combined with OpenLight's innovative silicon photonics platform will significantly accelerate the development of photonic integrated circuits.

3.2 Georgia Institute of Technology in the United States has developed a new electrically adjustable photonic metasurface platform

In May 2022, researchers at the Georgia Institute of Technology (Georgia Institute of Technology, Gatech) developed a new Electrically Tunable Photonic Metasurface Platform (Electrically Tunable Photonic Metasurface Platform). Metasurfaces have special optical properties that make optical systems thin and light. Traditional metasurfaces are passive and their properties cannot be changed or tuned after fabrication. The Georgia Institute of Technology in the United States has developed a new electrically adjustable photonic metasurface platform based on a nanophotonic material called a special phase change material. Researchers change the optical properties of special phase change materials through local heating, allowing them to form reconfigurable metasurface platforms. After testing, the platform's reflection characteristics change range reaches 11 times, and it has a wide range of spectral tuning operation performance and faster tuning speed. The technology will facilitate advances in lens technology and is expected to have a direct impact on technologies such as lidar systems, imaging, spectroscopy and sensing.

3.3 Intel Research Institute in the United States has made significant progress in optoelectronic integration technology

In July 2022, Intel Research Institute in the United States successfully integrated optical and electronic devices on silicon wafers. Intel successfully fabricated an 8-wavelength distributed feedback laser array with 8 microring modulators and optical waveguides on a 300mm wafer, where each microring modulator is tuned to a specific wavelength. Using multiple wavelengths, each microring can individually modulate light waves to enable independent communications. This optoelectronic co-packaging solution uses dense wavelength division multiplexing technology. The output power uniformity reaches ±0.25 dB and the wavelength spacing uniformity reaches ±6.5%, which are both better than the industry level and demonstrate the significant reduction of photons while increasing bandwidth. Chip size prospects. As electrical interconnect performance gradually approaches practical limits, integrating silicon circuits and optical devices side by side on the same package is expected to improve the energy efficiency of input/output (I/O) interfaces and extend transmission distances in the future.

3.4 California Institute of Technology has developed a new type of ultrafast all-optical switch

In August 2022, researchers at the California Institute of Technology (Caltech) developed a new all-optical switch that can process information at a speed of up to 9 terabits per second and consumes less energy, breaking the boundaries of integrated optics. A record of the overall performance of the platform. The researchers took advantage of the strong equivalent second-order nonlinear optical effect of the thin film lithium niobate platform and cleverly designed the lithium niobate nanowaveguide to enable light pulses of different wavelengths to propagate at similar group velocities without pulse broadening. , which can precisely control the quasi-phase matching and dispersion of lithium niobate nanowaveguides. This achievement is expected to be applied to realize integrated nonlinear optical systems in the future.

3.5. An international research team develops a new magneto-optical modulator that can be used in superconducting computers

In September 2022, the University of California, Santa Barbara (UCSB), BBN Technologies, Microsoft Research (MSR), University of Cagliari (Italy) Cagliari and researchers at Tokyo Institute of Technology in Japan have developed a magneto-optical modulator that could help realize large-scale electronic devices and computers based on superconductors. Superconductors only work properly at low temperatures and need to transmit data through optical fibers to avoid interference from temperature. An international team of researchers has developed a device that controls the properties of light beams through magnetic fields, converting information carried by electric currents in electromagnets into light through a physical mechanism called the magneto-optical effect. Light can travel through optical fibers and carry information out of cold environments without affecting cryogenic devices. This magneto-optical modulator is capable of achieving a modulation rate of 2 gigabits per second and transmits information using less than 4 picojoules per bit. The device is a key component in improving transmission rates in superconducting circuits. The field of low-temperature magneto-optical materials is an unexplored field, and related research will have broader space in the future.

3.6 The Technical University of Denmark has developed a chip-based beam steering device that can be used in lidar

In August 2022, researchers at the Technical University of Denmark (DTU) developed a chip-based beam steering technology that can be used to create smaller and lower-cost lidar. Beam steering is a key technology for lidar systems, but traditional mechanical beam steering systems are bulky, expensive, vibration-sensitive, and limited in speed. Researchers at the Technical University of Denmark have developed a chip-based optical phased array device that can eliminate optical aliasing and achieve beam steering over a large field of view while maintaining high beam quality. This research is expected to pave the way for small, economical, efficient and high-performance lidar, which will be widely used in fields such as autonomous driving, free space optical communications, 3D holography, biomedical sensing and virtual reality.

3.7 The University of Sussex in the UK has developed a new photonic device microcomb that can be used in the next generation of ultra-precise atomic clocks

In August 2022, researchers at the University of Sussex in the United Kingdom developed a new photonic device microcomb. The microcomb maintains long-term stable properties and can produce multiple light frequencies on tiny cavities called microresonators to form different colors of light. The colors are evenly distributed, so the microcomb behaves like a "ruler made of light" and can be used to measure or generate frequencies with extremely high precision. The University of Sussex research team embedded the microchip into a standard laser to generate a new type of laser cavity soliton, which can ensure that the microcomb operates in the required soliton state. This technology can be used in the next generation of ultra-precise atomic clocks, network communications, lidar, etc.