Hardware [9] Detailed explanation of diode clamp circuit

1 Overview

In the previous article on diode limiting circuits, we learned about diode limiting circuits, which can clip a portion of the signal without affecting the remaining signal. Today we will learn about another diode-based circuit that can raise or pull the input waveform above or below a certain DC reference level without changing the shape of the input signal waveform. This circuit is called It is a diode "clamper" circuit. The clamp circuit is also called a DC restorer.

Clamp circuits are generally divided into two categories:

Positive Clamps (Positive Clamps)
Negative Clamps (Negative Clamps)

Forward Clamp Circuit : This type of clamp circuit shifts the input signal waveform in the forward direction so that the waveform lies above the DC reference level.
Negative Clamp Circuit : This type of clamp circuit shifts the input signal waveform in the negative direction, with the result that the waveform lies below the DC reference level.

The orientation of the diodes in the clamp circuit determines the type of clamp circuit.

1.1 Forward clamp circuit

The circuit of a forward clamper is shown in the figure below:
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Here, the circuit consists of three main components:

Capacitor Diode
Load
Resistor

The diode and the load resistor are connected in parallel, that is, the cathode (cathode) of the diode is connected to the capacitor and the anode (anode) is connected to ground.

When designing the clamp circuit, the capacitor value and the load resistor value must be selected so that τ = RC (time constant) is large enough to ensure that the voltage across the capacitor does not discharge significantly during the diode turn-off period. In this article, we assume that the time constant τ ≥ 5T (T represents the period of the input signal).
Assume that when power is turned on, the input signal is in the positive half cycle, then the output signal is basically equal to the input signal at this time, because the capacitor is slowly charging through the load resistor RL with a large resistance at this time, the voltage drop across the capacitor is 0, and the voltage of the entire circuit The landings all fell on RL.

Once the input waveform signal switches to the negative half cycle, the diode is forward biased, equivalent to a length of wire. As a result, since the diode's on-resistance is very small, the capacitor quickly charges to the input signal voltage, which we call Vc. During the negative half-cycle of the input signal, the diode is conducting:
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the output during this period is 0V, since a closed diode is equivalent to a short circuit. Also, note that during this time the capacitor will charge quickly to a value close to the input signal "V" because the time constant RC will be very small due to the small effective resistance of the diode when it is conducting. Note the polarity of the capacitor when it is fully charged.

Once the input signal switches to the positive half cycle, the diode will be reverse biased. During this period, the diode will be in a cut-off state, equivalent to an open circuit:
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during the positive half cycle, the fully charged but slowly discharging capacitor is equivalent to one battery, the input signal is also equivalent to one battery, and the power part of the entire circuit is equivalent to two batteries. Series:
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Therefore, the output voltage is the sum of the applied input voltage and the charge stored in the capacitor:

Vout = Vin + Vc

Vc is the input peak voltage. It can be clearly seen from the above equation that the above circuit adds a forward DC bias Vc to the input voltage signal.
When the input signal Vin reaches its peak value during the positive half cycle, Vin = Vc, then:

Vout = Vin + Vc = 2Vc

We use the following circuit to test the forward clamp circuit:
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The circuit after welding is as follows:
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The input and output waveforms are as follows:
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yellow is the output waveform, and cyan is the output waveform. It can be seen that the output waveform is lifted as a whole, and the lifting amplitude is about 2V. The low level of the output waveform is about 0.6V, which is caused by the voltage drop of diode 1N4148 to ground. The average voltage before rising is 0V, and the average voltage after rising is about 1.4V.

1.2 Bias forward clamp circuit

A bias voltage can be added to the clamp circuit, which will further boost the output waveform:
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here a DC bias supply Vdc is added to the circuit, with its negative terminal connected to ground and its positive terminal connected to the positive terminal of the diode.
Like the previous circuit without bias, assuming that the input signal is in the positive half cycle when power is turned on, then the output signal during this period is basically equal to the input signal.
Once the input signal switches to the negative half cycle, the diode conducts, and the equivalent circuit is as follows:
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During this period, the load resistor is directly in parallel with the bias voltage Vdc, so during this period, the output voltage is equal to Vdc. In addition, during this period, the input signal Vin and the bias power Vdc are equivalent to two batteries connected in series to charge the capacitor. Please note the polarity of the capacitor charge.

Using Kirchhoff's voltage law (KVL) , we can determine how much charge is stored in the capacitor.

We start from the ground below and analyze in a clockwise direction, that is, the detour direction is clockwise. First encounter the input signal voltage Vin, the lower voltage is higher and the upper voltage is lower, that is, the voltage is reduced along the detour direction, which is recorded as -Vin,. When encountering the capacitor again, the left side is negative and the right side is positive. The voltage increases along the winding direction, which is recorded as Vc. When the bias voltage Vdc is encountered again, the voltage is reduced along the winding direction, recorded as -Vdc. Apply the KVL succinct equation:

-Vin + Vc - Vdc = 0

You can get:

Vc = Vin + Vdc

It can be seen that during the negative half cycle, the capacitor voltage will charge to Vin + Vdc.

When the input signal switches to the positive half cycle, the diode will go into an off state because it will be reverse biased by the input. During this period, the diode is turned off, so that the DC power supply Vdc has no effect on the circuit:
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the output voltage Vout = Vin + (Vin +Vdc) = 2Vin + Vdc.

We use the following circuit to test the forward bias circuit:
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When the bias voltage is 1V, the waveform is as follows:
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Yellow is the input waveform and cyan is the output waveform. It can be seen that the minimum value and average value are about 1V higher than the previous circuit without bias.

When the bias voltage is 2V, the waveform is as follows:
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Summary
Today we learned about the clamp circuit composed of diodes and capacitors. The basic principle is to first charge the capacitor to the maximum input voltage, and then connect the fully charged capacitor in series with the input voltage to increase the output voltage.

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Origin blog.csdn.net/zhi_Alanwu/article/details/131261617