Principle of Double Diode Clamp Circuit

Principle of Double Diode Clamp Circuit  


As shown, the horizontal lines are protected nodes. When the voltage at this point exceeds Vcc+0.7V, the upper diode is turned on; and when the voltage at this point is less than -0.7V, the lower diode is turned on. Therefore, the voltage at this point is clamped between Vcc+0.7V - -0.7V.

Principle of Double Diode Clamp Circuit
For a normal diode, its forward resistance is about several thousand ohms, and its reverse resistance is several hundred thousand ohms (generally greater than 200 kiloohms), while the internal resistance of the field MOS tube is generally 10M-1000G ohms, so the diode's resistance The internal resistance is much smaller than the resistance of the FET. If the voltage is too high, higher than Vcc+Vd (diode conduction voltage drop), the upper diode is turned on, and the output voltage is clamped at Vcc+Vd; if the voltage is too low, lower than 0-Vd (diode conduction voltage drop), The lower diode conducts and the output voltage is clamped to -Vd.

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