CHAPTER 51 FLASH read and write protection settings and released
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References in this chapter: "STM32F4xx Chinese Reference Manual", "STM32F4xx specifications," Library documentation "stm32f4xx_dsp_stdperiph_lib_um.chm" and "Proprietary code read-out protection on microcontrollers".
51.1 Option byte read and write protection
In the actual release of the product, the internal FLASH STM32 chip stores a control program, if you do not make any protective measures you can use to download directly to the contents of the internal FLASH read back and get the code to copy bin or hex file format, with ulterior motives manufacturers can use the code file cottage. To this end, STM32 chip provides multiple ways to protect the internal FLASH program is not illegal to read, but by default this protection is not turned on, to open the function, it is necessary to rewrite the internal FLASH option byte (Option Bytes ) configuration.
51.1.1 option byte
Option byte FLASH space is a special section, the STM32 chip based on its contents read and write protection, etc. Reset voltage configuration, the option configuration table 511 bytes.
Table 511 Option byte constitute
Address
[63:16]
[15: 0]
0x1FFF C000
retention
ROP and user option byte (the RDP & the USER)
0x1FFF C008
reserved
sector write protection bits 0 to 11 nWRP
0x1FFE C000
Reserved
Reserved
0x1FFE C008
reserved
sectors 12-23 nWRP write protection bit
option byte specific data bit configuration are described in Table 512.
Table 512 option byte specific data bit configurations described
Option byte (word address C000 0x1FFF)
RDP: read protection option bytes.
Read protection for the protection of software code stored in Flash.
Bit 15:. 8
0xAA: Grade 0, no protection
other values: Level 1, a memory read protection (debug limited functionality)
0xCC: Level 2, the protective chip (debug and prohibited from the RAM start)
the USER: user option byte
This byte configure the following functions:
watchdog event: hardware or software
to generate a reset event to stop mode
to generate a reset event into the standby mode
bit. 7
nRST_STDBY
0: a reset into standby mode
1: not generate a reset
bit. 6
nRST_STOP
0: a reset stop mode
1: not generate a reset
bit. 5
WDG_SW
0: hardware watchdog
1: software watchdog
bit. 4
0x1: unused
bit. 3: 2
BOR_LEV: reset the BOR level
of these bits comprises releasing the reset signal required to achieve the supply voltage threshold.
By the write operation performed on these bits, the new BOR level value can be programmed to Flash.
00: BOR Level 3 (VBOR3), the reset threshold voltage of 2.70 V to 3.60 V
01: BOR Level 2 (VBOR2), the reset threshold voltage of 2.40 V to 2.70 V
10: the BOR Level 1 (VBOR1), the reset threshold voltage of 2.10 V to 2.40 V
. 11: the BOR off (VBOR0), the reset threshold voltage is 1.8 V to 2.10 V
bit. 1: 0
0x1: unused
option byte (word address 0x1FFF C008)
bit 15
SPMOD: nWPRi selected bit pattern
0: nWPRi write protection bits (default)
. 1: code for reading out bit nWPRi protection (Proprietary code readout protection, PCROP)
bit 14
DB1M: to set the internal 1MB FLASH product dual mode Bank
0: Bank of the single mode
1: Bank use mode of two
bits 13:12
0xF: unused
nWRP: Flash write protection option bytes.
0-11 sector write protection may be employed.
Bit. 11: 0
nWRPi (I is 0-11, provided corresponding to the protection sectors 0-11):
0: Enables the write protection of the selected sector
1: Close selected sector write protection
option byte (word, address 0x1FFE C000)
bit 15: 0
0xFF: unused
option byte (word address 0x1FFE C008)
Bit 15:12
0xF: Unused
nWRP: Flash write protection option bytes.
12-23 may be employed sector write protection.
Bit 11: 0
nWRPi:
0: open write-protected sector i.
1: closed sector i write protected.
We mainly on the option byte configuration RDP-bit and PCROP bits, which are used to configure the protection level and read the code read protection.
51.1.2 RDP reading level of protection
RDP bit value modification options may be provided inside FLASH byte following protection:
0xAA: Level 0, unprotected
This is the default level of protection STM32, it does not read any protection, read the internal FLASH and "Backup SRAM" of content without any restrictions. (Note here that the "backup SRAM" refers to the backup SRAM space STM32 domain, does not refer to the main SRAM, the same below)
Other values: Level 1, enable read protection
The RDP is configured to 0xAA or any value except 0xCC, will enable read protection level 1. In this protection, the use of debugging functions (using the download, emulator) or from the internal SRAM bootstrap has not given any access (read and write, erase are disabled) on the internal FLASH and SRAM backup; if STM32 is the internal bootstrap from FLASH, which allows any access to the internal FLASH and SRAM backup of.
That is, in level 1 mode, any attempt were banned from operating outside access to internal FLASH content, such as its contents can not be read by the downloader, or write a program to start from the inside of SRAM, if the program reads internal FLASH, will be prohibited. And if it is their own access to internal FLASH chip, is no problem, for example, in front of "internal FLASH read and write" their own code experiment FLASH erase the contents of the internal space, even at the level of read-protected 1, but also normal rewritable .
When the chip is in level 1, you can put the option byte RDP bit is reset to 0xAA, Recovery Level 0. Before return to level 0, the chip will automatically erase internal FLASH and SRAM backup of the contents, that is, after downgrading the original internal FLASH code will be lost. Level 1 program in the use of the bootstrap SRAM can also access options to modify the byte, so if the original internal FLASH operation code does not read protection is released, it can be loaded to a SRAM bootstrap program to protect downgrade behind us such experiments will be conducted.
0xCC: Level 2, prohibit debugging
When the RDP configured 0xCC value, will enter the highest level of read protection, and the settings can not downgrade, it will be a permanent ban JTAG interface for debugging (equivalent to fuse). At this level, in addition to having all the protection functions of the level 1, but it is further prohibited from SRAM or bootstrap system memory (i.e., usually use will be invalid serial ISP download function), the JTAG debug-related functions are disabled, the option byte can not be modified. It only supports access (read and write, erase) internal FLASH and SRAM, whose own internal FLASH bootstrap.
Usually reserved for "back door" in the program due to the set can not be downgraded after Level 2, can not by JTAG, serial ISP, etc. updates, so use this level of protection in order to update the application, if there is no backdoor program , the chip will not be able to update the application. The so-called "back door" is a program IAP (In Application Program), it gets the program content will be updated via a communication interface, and then use the internal FLASH erase operation to burn the contents to its own internal FLASH, implement application updates.
Access at different levels of restrictions Figure 511.
Access restrictions at different levels Figure 511
State conversion between different protection levels shown in Figure 512.
512 different state between the level converter of FIG.
51.1.3 PCROP code reader protection
In STM32F42xx and STM32F43xx series of chips, in addition to the entire sheet can be protected using RDP FLASH read, there is a specific code read protection function (Proprietary code readout protection, hereinafter referred PCROP), which may be of an internal FLASH several designated sector to provide protection, it can be used to protect some IP code, to facilitate the development of other secondary, Figure 513.
Figure 513 PCROP protection
When if the sector is write-protected, the debugger can not SPMOD bit is set to 0 (the default), nWRPi bits for designating write protection sector, which can prevent an erroneous operation resulting in a change pointer FLASH content, erase the contents of the sector; SPMOD when the bit is set to 1, nWRPi bit specifies a sector to be protected PCROP. Wherein PCROP feature prevents the contents of the specified FLASH sector is read, and write protection can prevent an accidental write only, read out can not be prevented.
To turn off function when PCROP must be read from the chip to make a reduced level of protection level 0, while 0 SPMOD position to close properly; original chip if the read protection level 0, and the enable protection of PCROP, close to when PCROP should first read the protection level is set to level 1, then set SPMOD to 0 at the same time downgraded.
51.2 Modify option byte process
Content modification option byte may modify various configuration, however, when the application is running, the contents of which can not be overwritten by the option byte address directly, for example, then use the pointer address modification 0x1FFFC0000 operation is invalid. Must be set to the corresponding data bit in the register FLASH_OPTCR and FLASH_OPTCR1 To rewrite the contents, the register corresponding to the option byte position shown in Figure 514 and 515 in FIG, details, see "STM32 Reference Manual."
Register 514 FLASH_OPTCR explanatory view (nWRP sector represents 0-11)
Register 515 FLASH_OPTCR1 explanatory view (nWRP sector represents 12-23)
By default, FLASH_OPTCR register OPTLOCK bit 0 is 1, it indicates the option byte is locked, unlocked only be changed when needed, when the value of the register is complete, bit 1 FLASH_OPTCR of register values OPTSTRT is set to 1, the hardware will erase the contents of the option byte sectors, and writes the value FLASH_OPTCR / 1 register which contains the option byte.
Therefore, the option to modify the configuration byte following steps:
(1) Unlock is written in Flash OPTKEY1 option key register (FLASH_OPTKEYR) in = 0x0819 2A3B; OPTKEY2 = 0x4C5D 6E7F then written in Flash option key register (FLASH_OPTKEYR) in.
BSY bit (2) Check FLASH_SR register to confirm whether the other Flash operations not performed.
(3) writing the value in the option byte FLASH_OPTCR and / or FLASH_OPTCR1 register.
(4) the option to start FLASH_OPTCR register bit (OPTSTRT) is set.
(5) waiting for BSY bit is cleared, i.e., the write is complete.
51.3 Options byte library functions
To simplify programming, the STM32 standard library provides library functions that encapsulate the operation of modifying the option byte register.
1. Option byte unlock, lock function
Option byte unlock a locked function see Listing 511.
Listing 511 byte option to unlock, lock
1
2 #define FLASH_OPT_KEY1 ((uint32_t)0x08192A3B)
3 #define FLASH_OPT_KEY2 ((uint32_t)0x4C5D6E7F)
4
5 /**
6 * @brief Unlocks the FLASH Option Control Registers access.
7 * @param None
8 * @retval None
9 */
10 void FLASH_OB_Unlock(void)
11 {
12 if((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) != RESET)
13 {
14 /* Authorizes the Option Byte register programming */
15 FLASH->OPTKEYR = FLASH_OPT_KEY1;
16 FLASH->OPTKEYR = FLASH_OPT_KEY2;
17 }
18 }
19
20 /**
21 * @brief Locks the FLASH Option Control Registers access.
22 * @param None
23 * @retval None
24 */
25 void FLASH_OB_Lock(void)
26 {
27 /* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */
28 FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK;
29 }
When unlocked, it FLASH_OPTCR unlock register write two parameters, when locked, FLASH_OPTCR_OPTLOCK position FLASH_ OPTCR register.
2. Set the reading level of protection
After setting the option byte register bits can be unlocked RDP call FLASH_OB_RDPConfig complete, see Listing 512.
Listing 512 set read protection level
1 /**
2 * @brief Sets the read protection level.
3 * @param OB_RDP: specifies the read protection level.
4 * This parameter can be one of the following values:
5 * @arg OB_RDP_Level_0: No protection
6 * @arg OB_RDP_Level_1: Read protection of the memory
7 * @arg OB_RDP_Level_2: Full chip protection
8 *
9 * /!\ Warning /!\ When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
10 *
11 * @retval None
12 */
13 void FLASH_OB_RDPConfig(uint8_t OB_RDP)
14 {
15 FLASH_Status status = FLASH_COMPLETE;
16
17 /* Check the parameters */
18 assert_param(IS_OB_RDP(OB_RDP));
19
20 status = FLASH_WaitForLastOperation();
21
22 if(status == FLASH_COMPLETE)
23 {
24 *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = OB_RDP;
25
26 }
27 }
The function of the input parameters for the corresponding register bit RDP level, a warning that if the annotation is configured to OB_RDP_Level_2 be unrecoverable. Similarly, there is a corresponding library functions other configuration options, such as FLASH_OB_PCROP1Config, FLASH_OB_WRP1Config are to be provided for the protection or WRP PCROP protection (write protect) sector.
3. Write the option byte
Function on the call in a step after the configuration register, but also the list of the calling code function 513 FLASH_OB_Launch contents of the register byte is written into the option.
Listing Options written 513 bytes
1 /**
2 * @brief Launch the option byte loading.
3 * @param None
4* @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
5 * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
6 */
7 FLASH_Status FLASH_OB_Launch(void)
8 {
9 FLASH_Status status = FLASH_COMPLETE;
10
11 /* Set the OPTSTRT bit in OPTCR register */
12 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= FLASH_OPTCR_OPTSTRT;
13
14 /* Wait for last operation to be completed */
15 status = FLASH_WaitForLastOperation();
16
17 return status;
18 }
This function sets the bit FLASH_OPTCR_OPTSTRT call waiting function FLASH_WaitForLastOperation write completion, and return to the write state, if the normal operation, it will return FLASH_COMPLETE.
51.4 Experiment: Set write protection and lifted
In this study, we will be an example to explain how to modify the option byte configuration, change the reading level of protection, set PCROP or write protected, the last byte of the option to restore the default values.
Operation to be carried out this experiment is rather special, (using SRAM start-up mode) are carried out in the SRAM in the development and debugging process. For example, when the direct use FLASH debugging version of the program, if the program is run after the sector write-protected and not canceled operation or the release operation is not normal, not at this time will give the chip internal FLASH download new programs , eventually carried the bootstrap method to be used SRAM release operation. So in this experiment it is easy to modify the parameters of the option bytes, we use SRAM unified version of the program to develop and learn, and then when debugging version of SRAM instead FLASH normal version.
About the configuration of debugging code in the SRAM, please refer to the previous chapters.
note:
If you want to modify the code to test yourself, please note that the backup of the original project code in the learning process. When the chip is protected FLASH cause can not be downloaded to the FLASH program, the project can be downloaded to the chip, and uses SRAM start running, you can restore the default configuration to the chip. But if you modify the read protection level 2, the use of any method can not be recovered! (In addition to this configuration, other options can juggle the test.)
51.4.1 Hardware Design
This experiment debugging code in the SRAM, and thus the BOOT0 BOOT1 pins using jumpers connected to 3.3V, the chip start from the SRAM.
51.4.2 Software Design
In this study, the project name is "read and write protection settings and Release", open the project with learning to read, it is from "RAM Debug - Colorful water lights," adapted from the project. In order to facilitate the display and transplantation, we FLASH internal operations related to write code to "internalFlash_reset.c" and "internalFlash_reset.h" files, these files are our own written content does not belong to the standard library, according to your name the file preferences.
1. The main experiment
(1) learn to configure sector write protection;
(2) learn to configure PCROP protection;
(3) learn to configure reading level of protection;
(4) Learn how to restore the default configuration option bytes;
2. Code Analysis
Configure sector write protection
We first code listing 514 is set to release the write protection process to learn how to configure the option byte.
Listing 514 configuration sector write protection
1
2 #define FLASH_WRP_SECTORS (OB_WRP_Sector_0|OB_WRP_Sector_1)
3 __IO uint32_t SectorsWRPStatus = 0xFFF;
4
5 /**
6 * @brief WriteProtect_Test, general write protection configuration
7 * @param run will be write-protected sectors FLASH_WRP_SECTORS after this function, repeat the solution will be write-protected
8 * @retval None
9 */
10 void WriteProtect_Test(void)
11 {
12 FLASH_Status status = FLASH_COMPLETE;
13 {
14 / * Get the write-protected sector * /
15 SectorsWRPStatus = FLASH_OB_GetWRP() & FLASH_WRP_SECTORS;
16
17 if (SectorsWRPStatus == 0x00)
18 {
19 / * sector has been write protected, perform de-protection process * /
20
21 / * enable access OPTCR Register * /
22 FLASH_OB_Unlock();
23
24 / * set the corresponding nWRP position, release the write protection * /
25 FLASH_OB_WRPConfig(FLASH_WRP_SECTORS, DISABLE);
26 status=FLASH_OB_Launch();
27 / * begin programming option bytes * /
28 if (status != FLASH_COMPLETE)
29 {
30 FLASH_ERROR ( "option byte programming error, release the write protection failed, status =% x", status);
31 /* User can add here some code to deal with this error */
32 while (1)
33 {
34 }
35 }
36 / * Forbidden OPTCR register * /
37 FLASH_OB_Lock();
38
39 / * Get the sector write-protected * /
40 SectorsWRPStatus = FLASH_OB_GetWRP() & FLASH_WRP_SECTORS;
41
42 / * Check whether the configuration * /
43 if (SectorsWRPStatus == FLASH_WRP_SECTORS)
44 {
45 FLASH_INFO ( "release the write protection success!");
46 }
47 else
48 {
49 FLASH_ERROR ( "not release the write protection!");
50 }
51 }
52 else
53 {/ * If the sector is not write-protected, open write-protected configuration * /
54
55 / * Enable access OPTCR register * /
56 FLASH_OB_Unlock();
57
58 / * Enable FLASH_WRP_SECTORS sector write protection * /
59 FLASH_OB_WRPConfig(FLASH_WRP_SECTORS, ENABLE);
60
61 status=FLASH_OB_Launch();
62 / * begin programming option bytes * /
63 if (status != FLASH_COMPLETE)
64 {
65 FLASH_ERROR ( "option byte programming error, set the write protection failed, status =% x", status);
66 while (1)
67 {
68 }
69 }
70 / * disable access OPTCR register * /
71 FLASH_OB_Lock();
72
73 / * Get the write-protected sector * /
74 SectorsWRPStatus = FLASH_OB_GetWRP() & FLASH_WRP_SECTORS;
75
76 / * Check whether the configuration * /
77 if (SectorsWRPStatus == 0x00)
78 {
79 FLASH_INFO ( "write protected success!");
80 }
81 else
82 {
83 FLASH_ERROR ( "write protected failed!");
84 }
85 }
86 }
87 }
This function is divided into two parts, which operate in accordance with the state of the target sector, it is protected if the write protection state of the non-original sector, if the protection for the protected state is released. The main procedure is as follows:
call FLASH_OB_GetWRP function to get the target sector protection status if the sector is write-protected, then began to lift the protection of the process or the process began to write protected;
calling program FLASH_OB_Unlock unlock the option byte;
call FLASH_OB_WRPConfig function configures the target sector closed or opened write-protected;
function to call FLASH_OB_Launch written into the option configuration register byte;
call FLASH_OB_GetWRP function checks whether the configuration;
call FLASH_OB_Lock not modify the option byte.
Configuration PCROP protection
The process of configuring PCROP protection and write-protect the configuration process is slightly different, see Listing 515.
Listing 515 configuration PCROP protection (internalFlash_reset.c file)
1
2 /**
3 * @brief SetPCROP, set PCROP bit for testing unlocking
4 * @note use problematic serial ISP download software, may cause PCROP position 1,
5 can not cause the chip to download the program to the FLASH, this function is used to position PCROP 1,
6 can not download the program to simulate the FLASH environment to unlock the program for debugging.
7 Without understanding the role of PCROP bit, do not perform this function! !
8 * @param None
9 * @retval None
10 */
11 void SetPCROP(void)
12 {
13
14 FLASH_Status status = FLASH_COMPLETE;
15
17
18 FLASH_INFO();
19 FLASH_INFO ( "being set PCROP protection, please be patient ...");
20 // unlock the option byte
21 FLASH_OB_Unlock();
22
23 // set PCROP mode
24 FLASH_OB_PCROPSelectionConfig(OB_PcROP_Enable);
25 // Set protection sector 0 of PCROP
26 FLASH_OB_PCROPConfig(OB_PCROP_Sector_10,ENABLE);
// set the register 27 is written into the option byte
28 status =FLASH_OB_Launch();
29
30 if (status != FLASH_COMPLETE)
31 {
32 FLASH_INFO ( "set PCROP failed!");
33 }
34 else
35 {
36 FLASH_INFO ( "Set PCROP success!");
37
38 }
39 // lock option byte
40 FLASH_OB_Lock();
41 }
The unlock code option byte, the function call FLASH_OB_PCROPSelectionConfig SPMOD mode register bits configured as PCROP, then calls the function configuration FLASH_OB_PCROPConfig certain protection sector.
Byte recovery options to their default values
When the chip is set to a read protection or protection PCROP, when the time to download the program internal FLASH chip may be error erasing FLASH 516 and 517 of FIGS failure occurs.
Figure 516 tips erase failure
Figure 517 card at the start of erasing the progress bar state
As long as the read protection configuration has become a Level 2 protection, you can use the function to start running the code in Listing SRAM 516 byte recovery options to its default state, making FLASH download can proceed normally.
Listing 516 byte recovery options to their default values
1 // @brief OPTCR register byte 0 (Bits[7:0]) base address
2 #define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14)
3 //@brief OPTCR register byte 1 (Bits[15:8]) base address
4 #define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15)
5 //@brief OPTCR register byte 2 (Bits[23:16]) base address
6 #define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16)
7 // @brief OPTCR register byte 3 (Bits[31:24]) base address
8 #define OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17)
9 // @brief OPTCR1 register byte 0 (Bits[7:0]) base address
10 #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
11
12 /**
13 * @brief InternalFlash_Reset, restore the default configuration of internal FLASH
14 * @param None
15 * @retval None
16 */
17 int InternalFlash_Reset(void)
18 {
19 FLASH_Status status = FLASH_COMPLETE;
20
21 / * Enable the option byte register * /
22 FLASH_OB_Unlock();
23
24 / * erase user area (user area means the space not used by the program itself, can be customized) * /
25 / * Clear the flags of various FLASH * /
26 FLASH_ClearFlag(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |
27 FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR);
28
29 FLASH_INFO("\r\n");
30 FLASH_INFO ( "being prepared to be reinstated, please wait ...");
31
32 // Make sure the protection level to the read LEVEL1, register bits to recover PCROP
33 // PCROP from register bits Set to 0, when the level of protection must be read by a valid LEVEL0 into LEVEL1,
34 // otherwise modify invalid
35 FLASH_OB_RDPConfig(OB_RDP_Level_1);
36
37 status=FLASH_OB_Launch();
38
39 status = FLASH_WaitForLastOperation();
40
41 // set LEVEL0 and bit recovery PCROP
42
43 FLASH_INFO("\r\n");
44 FLASH_INFO ( "internal FLASH is erased, please wait ...");
45
46 // Close mode PCROP
47 FLASH_OB_PCROPSelectionConfig(OB_PcROP_Disable);
48 FLASH_OB_RDPConfig(OB_RDP_Level_0);
49
50 status =FLASH_OB_Launch();
51
52 // Set the other bits to default values
53 (*(__IO uint32_t *)(OPTCR_BYTE0_ADDRESS))=0x0FFFAAE9;
54 (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS))=0x0FFF;
55 status =FLASH_OB_Launch();
56 if (status != FLASH_COMPLETE)
57 {
58 FLASH_ERROR ( "failed to restore the default value option byte error code: status =% X", status);
59 }
60 else
61 {
62 FLASH_INFO ( "recovery option byte defaults success!");
63 }
64 // disable access
65 FLASH_OB_Lock();
66
67 return status;
68 }
This function is carried out as follows:
calling program FLASH_OB_Unlock unlock the option byte;
call FLASH_ClearFlag function clears all FLASH exception status flags;
FLASH_OB_RDPConfig function call to read protection level 1, so that the back off PCROP normal mode;
FLASH_OB_Launch call options written and waiting to be read byte-level protection is set up;
function call FLASH_OB_PCROPSelectionConfig close PCROP mode;
call FLASH_OB_RDPConfig function to read the protection level dropped to 0;
call FLASH_OB_Launch finalized the option byte and wait downgrade is completed, the result of this process needs to erase the contents of the internal FLASH, and the waiting time will be longer;
register, using "(* (__ IO uint32_t *) (OPTCR_BYTE0_ADDRESS)) = 0x0FFFAAE9;" direct operation and "(* (__ IO uint16_t *) (OPTCR1_BYTE2_ADDRESS)) = 0x0FFF;" statement to OPTCR and OPTCR1 registers associated with the option byte the bits restore defaults;
FLASH_OB_Launch call waiting function is written to the above-described configuration option byte;
byte complete recovery options to their default values operation.
main function
Finally, take a look at the main function of this experiment, see. Listing 517.
Listing 517 main function
1 /**
2 * @brief main function
3 * @param no
4 * @retval no
5 */
6 int main(void)
7 {
8 / * LED Port initialization * /
9 LED_GPIO_Config();
10 Debug_USART_Config();
11 LED_BLUE;
12
13 FLASH_INFO ( "This program will be downloaded into the internal SRAM STM32 run.");
14 FLASH_INFO ( "before downloading program, and make sure the BOOT0 BOOT1 breadboard pins are connected to the power supply 3.3V !!");
15
16 FLASH_INFO("\r\n");
17 FLASH_INFO ( "---- This is a STM32 chip internal FLASH unlocking procedure ----");
18 FLASH_INFO ( "FLASH chip therein program will return to the default option byte value");
19
20
21 #if 0 // project commissioning, use your presentation, do not need to run this function when the normal lift
22 SetPCROP (); // modify PCROP bit emulation chip is locked program can not be downloaded to the internal FLASH environment
23 #endif
24
25 #if 0 // project commissioning, use your presentation, do not need to run this function when the normal lift
26 WriteProtect_Test (); // Modify Write Protect bit, simulation chip sector is provided to a write-protected environment
27 #endif
28
30
31 / * byte recovery options to their default values, unprotect * /
32 if(InternalFlash_Reset()==FLASH_COMPLETE)
33 {
34 FLASH_INFO ( "option byte recovery is successful, the BOOT0 and BOOT1 pins are connected to GND,");
35 FLASH_INFO ( "then just find a common program, download the program to the internal FLASH chip test");
36 LED_GREEN;
37 }
38 else
39 {
40 FLASH_INFO ( "option byte recovery success or failure, please reset retry");
41 LED_RED;
42 }
43
45
46 while (1);
47 }
In the main function, the main function is called InternalFlash_Reset the recovery options byte to the default value, it does not call SetPCROP and WriteProtect_Test function sets the default write-protect the program, if you want to observe the experimental phenomena can be modified conditional compilation macros, it added to compile.
3. Download Test
BOOT0 BOOT1 pins and the plate developed using the jumpers are connected to the 3.3V power supply, start it in SRAM mode, then the connection boards "USB TO UART" interfaces with the computer with a USB cable, the computer serial debugging open end assistant, the compiled program is downloaded to the development board and reset operation, in serial debugging assistant can see debug information. After running the program, please wait until bright green development board or serial debugging information to give prompt restoration completed development board powered off, or because the recovery process is interrupted, the chip will be internal FLASH is protected.
FLASH inside the chip is protected, this program can be downloaded again to the development board to restore the default configuration SRAM operation.
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Author: Wood 0 0
Source: CSDN
Original: https: //blog.csdn.net/flyleaf91/article/details/52325561
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