Article directory
amendment
Under linux 4.0 kernel/drivers/net/phy/dp83867.c
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val);
}
+ if (phydev->interface == PHY_INTERFACE_MODE_GMII)
+ {
+ val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL);
+ val &= ~0x80;
+ phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val);
+ }
if (phy_interface_is_rgmii(phydev)) {
val = phy_read(phydev, MII_DP83867_PHYCTRL);
if (val < 0)
Preliminary knowledge
DP83867It is an Ethernet physical layer transceiver (PHY) chip. It is produced by Texas Instruments and is widely used in fields such as industrial automation, network communications, and embedded systems.
DP83867Supports Ethernet rates up to 10 Mbps, 100 Mbps and 1 Gbps , compliant with IEEE 802.3 standards. It adopts advanced digital signal processing technology, has excellent anti-interference performance and noise suppression capabilities, and can operate stably in harsh industrial environments.
The chip supports multiple interfaces, including MII (Media Independent Interface), RMII (Reduced MII Interface) and RGMII (Reduced GMII Interface). It also provides a wealth of functions and configuration options, such as adaptive constant rate, auto-negotiation, remote power management and diagnostic functions, to meet the needs of different applications.
DP83867It also has low power consumption features, which can reduce system energy consumption and extend battery life by optimizing power management and sleep mode. It also supports diagnostic and fault detection functions to help quickly locate and solve network problems.
Overall, DP83867 is a high-performance, highly reliable Ethernet physical layer transceiver chip suitable for various industrial and embedded network applications.
Why this modification?
After disable RGMII is the GMII interface.
DP83867 data sheet,
just look at the registers starting from 8.6 register maps
general purpose register
BMCR（Basic Mode Control Register）and BMSR（Basic Mode Status Register）are registers related to the Ethernet physical layer transceiver (PHY) and are used to control and monitor the basic mode and status of the PHY.
-
BMCR(
Basic Mode Control Register): The BMCR register is used to control the basic modes and functions of the PHY. It contains bit fields used to configure and control the operation of the PHY. Common bit fields include:- Enable/Disable: Used to enable or disable the functionality of the PHY.
- Auto-negotiation: Used to enable or disable the PHY's auto-negotiation feature, which allows the PHY to negotiate the best communication rate and duplex mode with the connected device.
- Rate selection: Used to select the communication rate of the PHY, such as 10 Mbps, 100 Mbps or 1 Gbps.
- Duplex mode: Used to select the communication duplex mode of the PHY, such as half-duplex or full-duplex.
-
BMSR(
Basic Mode Status Register): The BMSR register is used to provide the basic mode and status information of the PHY. It contains bit fields that indicate the current status of the PHY and supported features. Common bit fields include:- Connection status: Used to indicate whether the PHY has established a link with the connected device.
- Auto-negotiation completed: Used to indicate whether the PHY's auto-negotiation function is completed, that is, whether the optimal communication rate and duplex mode have been successfully negotiated.
- Rate support: Used to indicate the communication rate supported by the PHY.
- Duplex support: Used to indicate the communication duplex mode supported by the PHY.
There are many registers, just search them when you need them.