[Transfer] Talk about ARM and RISC-V

Talk about ARM and RISC-V


Reprinted from: Geek Time "Talking about ARM and RISC-V" (deleted
https://zhuanlan.zhihu.com/p/389626435
Related column: Shao Wei "Speaking Through Chips"
https://time.geekbang.org /column/intro/415


Interl, AMD, and x86 instruction sets

Before we start sharing today's content, let's think about why Intel will be the first in the industry?
Because it has an IDM model that grasps the cost structure and a Tick-Tock strategy that complies with Moore's Law, all of these are correct.
But in addition, there is another very important factor, that is, Intel has mastered the x86 instruction set.

Think about why AMD can compete with Intel all the year round?
AMD is even on the verge of bankruptcy, and even the headquarters building can be brought back to life after being sold. AMD YES again?
It is because AMD and Intel share the x86 instruction set.


About the instruction set and architecture

There are a lot of hardware content in the column. Today, we will talk about the instruction set.
In fact, if you want to explain the instruction set clearly, it is estimated that a new column can be opened. Here I will take it as an extended reading. Let’s briefly talk about ARM and RISC-V, two more topical instruction sets in the industry.

Let me talk about the definition first, what is an instruction set?
David Patterson, industry leader, academician of ACM and IEEE, winner of the 2017 Turing Award, and vice chairman of the board of directors of the RISC-V Foundation, gave a very easy-to-understand definition: software uses a professional vocabulary called an instruction set and Hardware speaks.
In other words, the instruction set is the bridge between hardware and software.
If there is another important concept besides transistors, integrated circuits and Moore's Law, it is the instruction set.

Maybe you usually read the news and see that the words ISA, architecture, and instruction set are mixed together, and you feel a little confused. In fact, ISA=instruction set=architecture , they all have the same meaning.
A CPU that implements an instruction set is called a microarchitecture .


Let me give you an example, ARMv, which is an instruction set and an architecture version . ARM's Cortex-A72 processor is a specific CPU
that implements the ARMv8 instruction set and is a microarchitecture . ARM's Cortex-A72 is a CPU IP that supports the ARMv8 instruction set, which is a bunch of RTL codes. Rockchip's RK3399 chip is a chip that integrates two Cortex-A72s. It is a physical body. This chip supports the ARMv8 instruction set. Any software that supports ARMv8 can run on RK3399.



ecology

When we say ARM, we don't pay much attention to the corporate story of a 6,000-employee, headquartered in the UK but has become a Japanese company after being acquired by Softbank, or the 5,000-plus-page book [ARMv8] that is publicly available online. Instruction Set Manual].
We mentioned more about Qualcomm’s Snapdragon on the hardware side, MediaTek’s Dimensity, Huawei’s Kirin, Samsung’s Galaxy, AWS’s Graviton, Apple’s Family Bucket, and the software side of Android, iOS, Red Hat, Ubuntu, SUSE , Kirin OS, etc., they are all in the ARM ecosystem .
Our focus is on the entire ARM ecosystem.

Similarly, when we talk about x86, we don't just refer to Intel and AMD, but also Microsoft, Linux, Oracle, SAP, etc. in the x86 ecosystem.
But x86 is not a publicly authorized instruction set. Although there are not only Intel and AMD, but for new entrants, the chance of doing x86 instruction set is almost minimal.
Relatively speaking, both ARM and RISC-V are open authorized instruction sets.
ARM is a commercially authorized instruction set, and RISC-V is an open source instruction set.
As for the CPU core, that is, the micro-architecture, both of them are commercial authorization models, which require payment.


In 2017, the Linley Group, an industry analysis company known for microprocessor analysis, gave a keynote speech at a RISC-V conference and showed a page of the most popular instruction sets. If you look at the number of CPUs that support different instruction sets , ARM is the most, judging from the pie chart, this is an overwhelming advantage.
But if calculated according to revenue, x86 is the most profitable instruction set because of its high unit price (ASP, average selling price).
In other words, of the two most popular instruction sets at present, one makes money and the other makes people.

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Instruction Set Development

When Intel launched the x86 instruction set, it was already a factory with 10,000 people, and it also won the key market of PC. At that time, Microsoft was just founded, with less than 10 people, so this is a process of building hardware first and then building software.
And ARM relied on its own flexible licensing model to enter the mobile phone market with the big ship of Texas Instruments, and won the key market of mobile phones in the feature phone era.
Then there was Symbian, Nokia's mobile phone operating system, and then Android.

In the era of mobile Internet, ARM is also lucky. Intel did not agree to Apple's customization requirements, so Apple chose ARM, an off-the-shelf CPU IP, and also used the existing instruction set to build the iOS system.
Therefore, what ARM catches up with is the process of hardware unification, software splitting, and then aligning to the hardware.

What about RISC-V, which started in 2010?
I recommend
you to read the interpretation and introduction of Mr. Bao Yungang, Institute of Computing Technology, Chinese Academy of Sciences.
Teacher Bao's team translated the RISC-V manual, subtitled "A Guide to Open Source Instruction Set".
http://riscvbook.com/chinese/RISC-V-Reader-Chinese-v2p1.pdf


The Birth and Development of RISC-V

Here I will simply talk about RISC-V from my perspective.

RISC-V was born at UC Berkeley University in the United States. It was originally an instruction set open for teaching.
However, RISC-V quickly went out of the circle because of its advantages of simplification, high efficiency, low energy consumption, modularity, scalability, free and open, no historical burden and inefficient instructions, so the RISC-V team realized its value Afterwards, it was decided to launch it into the market for commercial exploration.

The RISC-V architecture adheres to a simple design philosophy, completely abandons the historical burden, and starts lightly. With the help of computer architecture, it has become a relatively mature technology after years of development.
The RISC-V basic instruction set has only more than 40 instructions, plus other modular extension instructions, a total of dozens of instructions.
The RISC-V specification document is only 145 pages long, and such important content as the "privileged architecture document" is only 91 pages long.

If ARM uses the business model of IP authorization to reduce the difficulty of CPU design and bring the information technology world into the era of universal processors, then RISC-V uses a free and open open source instruction set model to lower the design threshold of CPU IP and make chips The industry has entered an era full of CPU IP.
RISC-V currently has more than 200 members. You can see this picture of the logos of major manufacturers. This picture comes from the RISC-V Foundation.

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business model

However, all technological or business model advantages will eventually be transformed into commercial success.
At present, most of the companies participating in RISC-V are small companies, or they are involved in small projects of large companies, and there is no special profit.
So what counts as commercial success?
Based on my experience and summarizing the history of ARM's success, I have listed three RISC-V as a successful sign of the instruction set:

Mass production of SoC with the latest technology Milestones
with software support
Support for killer applications or a 25% market share in the core market
I think any one is enough, of course there will definitely be one in the end, but the starting point for success is to win one of them.


Seeing this, if you are still interested in RISC-V, I suggest you read the article "The New Golden Age of Computer Architecture" (Chinese Edition (Wu Jin: 2018 Turing Lectures: The Golden Age of Computer Architecture), you may have a new understanding of RISC-V.



If you regard it as a general-purpose CPU, it was born late, but if you regard it as a domain-specific architecture DSA (Domain Specific Architecture), this modular design is very valuable, and it is the first to establish standards, open source and open, so The fragmented ecology is more flexible and efficient when accumulated, and has more opportunities to grow bigger.

But I want to say that the ecology must always be unified, and someone needs to master the balance between flexibility and standards, otherwise software investment will not be guaranteed, and eventually it will be a mess.

Finally, I end with an old photo from the Microprocessor Forum in 1992.
The instruction set is not a particularly technically difficult project; in the 1960s, every computer at IBM had its own instruction set and tools.
In 1992, there was also a full instruction set on that picture.
It is said that it is easy to die as a company in our chip industry, but in fact, more than half of the companies in the picture are left, and there are only two instruction sets left.

insert image description here


The development of computer instruction sets is a "snowball rolling on a long slope". There must be a core that cannot be broken, or the ecology cannot be split, and it must continue to roll steadily, that is, to maintain evolution and keep pace with the times.
Of course, this "slope" must be long enough and large enough to have the momentum of a snow-capped mountain in the later stage, and to obtain a core market with a large enough capacity.


Finally, I would like to talk about some digressions. I don’t know if you will completely believe what others say when you read some information on the Internet, but I will not.
Some of the articles we are seeing now, quite a few of them are drafts written by the publicity department of some companies, which cannot directly represent the real situation.
Therefore, generally when I read, I will first look at the source of the article and the background of the author.
I am also an ordinary person, and I will add my own ideas in some understandings, so you can get to know me from the opening sentence, and then determine what correction coefficient to add to me.

Regarding the instruction set, you can speak freely and talk about what you know. Welcome to leave a message in the comment area.

If you want to know more about chips, you can click to try my column "Speaking Through Chips".


2023-08-11

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Origin blog.csdn.net/lovechris00/article/details/132231518