Instructions and Directives
(1) The (assembly) instruction is the mnemonic of the CPU machine instruction. After assembly, a series of machine codes composed of 1 and 0 will be obtained, which can be read and executed by the CPU.
(2) (Assembly) Pseudo-instructions are not instructions in essence (just written in the code together with the instructions), it is provided by the assembler environment, the purpose is to guide the process of assembly, after assembly, the pseudo-instructions will not eventually generate the machine code.
ARM assembly feature 1: LDR/STR architecture
(1) ARM adopts the RISC architecture, and the CPU itself cannot directly read the memory, but needs to load the content in the memory into the general-purpose register of the CPU before it can be processed by the CPU.
(2) The ldr (load register) instruction loads the contents of memory into a general-purpose register.
(3) The str (store register) instruction stores the contents of the register in the memory space.
(4) The combination of ldr/str is used to realize data exchange between ARM CPU and memory.
ARM assembly feature 2: 8 addressing modes
(1) Register addressing mov r0, r1
(2) Immediate addressing mov r0, #0xff00
(3) Register shift addressing mov r0, r1, lsl#3 lsl (logic left shift, one bit to the left is equivalent to multiplying by 2, shifting to the left by three bits is equivalent to multiplying by 8)
(4) Register indirect addressing ldr r1, [r2] (ld appears, indicating that the value is loaded from memory to register)
(5) Base indexed addressing ldr r1, [r2, #4]
(6) Multi-register addressing ldmia r1!, {r2-r7, r12}
(7) Stack addressing stmfd sp!, {r2-r7, lr}
(8) Relative addressing beq flag
flag:
ARM assembly feature 3: instruction suffix BHS
The same instruction is often appended with different suffixes, resulting in different instructions. Frequently used suffixes are:
The function of B (byte) remains unchanged, and the operation length becomes 8 bits
The function of H (half word) remains unchanged, and the length becomes 16 bits
The function of S (signed) remains unchanged, and the operand becomes signed such as ldr ldrb ldrh ldrsb ldrsh
The function of S (S flag) remains unchanged, and affects CPSR flag bits such as mov and movs movs r0, #0
ARM assembly feature 4: conditional suffix
EQ/NE: equal/not equal (equal / not equal)
HS/LO: Unsigned higher than or equal to/unsigned lower than (higher or same/lower)
HI/LS: unsigned number higher/unsigned number lower than or equal to (higher/lower or same)
GE/LT: Signed greater than or equal/signed less than (greater or equal/less than)
GT/LE: Signed greater than/signed less than or equal (greater than/less or equal)
MI/PL: negative/non-negative
VS/VC: overflow/no overflow (overflow set / overflow clear)
CS/CC: carry/no carry (carry set / carry clear)
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