Collect information first to understand the current commonly used basic theories and implementation methods. For more information, refer to the link below.
It is recommended to read the following article:
Asynchronous & Synchronous Reset Design Techniques
reset
- Initialize the internal circuits of the microcontroller
- Restore all registers to default values
- Confirm the working mode of the MCU
- disable global interrupt
- turn off peripherals
- Set IO to high-impedance input state
- Wait for the clock to stabilize
- Get reset vector from fixed address and start execution
cause of reset
-
There are many factors that cause reset, and there are corresponding flag bits and vectors (different initialization processes can be performed)
- power on reset
- Power Loss Reset
- Externally generated manual reset signal
- Reset caused by executing the reset instruction
- Reset caused by illegal instruction
- Reset due to loss of clock
- watchdog reset
1. ARM reset source type
The reset source types of the ARM processor are shown in the table, including power-on reset, external hardware reset, internal hard reset (including PLL out-of-lock reset, software watchdog reset, error detection shutdown reset, and debug port hard reset), JTAG reset, external software reset and internal software reset (including debug port soft reset and JTAG soft reset).
All these reset sources are introduced into the reset controller, and different reset actions are generated according to different reset sources.
The ARM processor also has a built-in reset controller and hardware reset configuration controller. The function of the reset controller is to determine the cause of the reset, synchronize the reset module (if necessary), and reset the logic modules in the corresponding chip (including ARM embedded processor module, system interface unit module and communication processor module, etc.).
2. How reset works
In order to ensure that the ARM chip will not be in an uncontrolled state when the power supply does not reach the required level, a power monitoring and reset circuit must be added to the system. This circuit ensures that the core voltage and peripheral Before the port voltage reaches the requirement, the ARM chip is always in the reset state until the core voltage and the peripheral interface voltage reach the required level. The system reset process is shown in the figure.
At the same time, if the power supply voltage drops below the threshold value, the chip is forced to enter the reset state to ensure the stable operation of the system. For the design of the reset circuit, on the one hand, it should ensure that the reset low level time is long enough (generally more than 20ms) to ensure reliable ARM reset; on the other hand, it should ensure good stability to prevent ARM from being reset by mistake.
In addition, hardware monitoring reset (watchdog circuit, such as hardware monitoring chip MAX706, etc.) can also be used in the ARM system. This is due to the high clock frequency of the ARM system, and it is difficult to avoid interference and interference during operation. In severe cases, the system will crash or the program will be abnormal. The "Watch dog" circuit can be used instead of RC circuit. In addition to the power-on reset function, this circuit also has the ability to monitor the operation of the system and reset it again when the system fails or crashes.
The function of this circuit is: when the watchdog is enabled, if the system does not refresh the watchdog circuit within the specified time interval, it will generate a reset signal to make the system execute from the initial state again to improve the system's anti-interference ability . After the power-on reset, the watchdog circuit should be in a disabled state, and the watchdog circuit can be enabled by setting the control bit WDEN in the system control register 0 (Watchdog) to 1. After the watchdog circuit is enabled, the watchdog is refreshed by writing to the watchdog refresh port.