Implement a 2-bit serial carry parallel adder

      Design a 2-bit serial-carry parallel adder circuit, run the virtual experiment system, and get the experimental circuit shown in Figure 1 according to the following logic equation.

     Logic equation:

s1=A1⊕B1⊕C1

c2=A1B1+B1C1+C1A1

s2=A2⊕B2⊕C2

C3 = A2B2 + B2C2 + C2A2

Figure 1 Design circuit diagram of two-bit full adder

 

  1. Turn on the power switch, set the data switch according to the input signal in Table 1, and list the corresponding output value in 1.

                                                  Table 1 Truth table of 2-bit serial carry parallel adder

enter

output

A2

A1

B2

B1

C1

S2

S1

C3

0

1

0

1

0

1

0

0

0

1

0

1

1

    1

1

0

1

0

0

1

0

1

1

0

1

0

0

1

1

0

0

1

1

0

1

1

0

0

1

1

1

1

1

1

1

1

1

1

The screenshot of the output value corresponding to the input result in Table 1 is shown in the figure below.

 

Input 00110 output result               

 

Input 00111 to output the result

Guess you like

Origin blog.csdn.net/qq_52913088/article/details/126700720