The development of the instruction system is heading in two completely different directions. One is to enhance the functions of the original instructions and set more complex new instructions to harden the software functions. This type of machine is called a complex instruction system computer (CISC). A typical There are computers using the X86 architecture; the other is to reduce the types of instructions and simplify the function of instructions to increase the execution speed of instructions. This type of machine is called a reduced instruction system computer (RISC), typically ARM and MIPS architecture computers.
The development of the instruction system is heading in two completely different directions. One is to enhance the functions of the original instructions and set more complex new instructions to harden the software functions. This type of machine is called a complex instruction system computer (CISC). A typical There are computers using the X86 architecture; the other is to reduce the types of instructions and simplify the function of instructions to increase the execution speed of instructions. This type of machine is called a reduced instruction system computer (RISC), typically ARM and MIPS architecture computers.
CISC（Complex Instruction Set Computer）
The main features of CISC are:
1) The instruction system is complex and huge, and the number of instructions is generally more than 200.
2) The length of the instruction is not fixed, there are many instruction formats, and there are many addressing modes.
3) The instructions that can be accessed are not limited.
4) The frequency of use of various instructions varies greatly.
5) The execution time of various instructions varies greatly, and most instructions need multiple clock cycles to complete.
6) Most of the controllers are controlled by microprograms.
7) It is difficult to generate an efficient object code program with optimized compilation.
Such a huge instruction system puts forward extremely high requirements on the design of instructions, and the development cycle becomes very long. Later, people discovered that blindly pursuing the complexity and completeness of the instruction system is not the only way to improve computer performance. The test on the traditional CISC instruction system shows that the frequency of use of various instructions is very different. Only about 20% of the relatively simple instructions are used repeatedly, accounting for about 80% of the entire program; and about 80% of the instructions are very few Use, about 20% of the entire program. Starting from this fact, people began to study the rationality of the instruction system, so RISC was born.
RISC（Reduced Instruction Set Computer）
The main features of RISC are:
1) Select some simple instructions with the highest frequency of use, and the functions of complex instructions are realized by the combination of simple instructions.
2) The instruction length is fixed, the types of instruction formats are few, and the types of addressing modes are few.
3) Only the Load/Store (fetch/store) instruction accesses memory, and the operations of other instructions are performed between registers.
4) There are quite a lot of general-purpose registers in the CPU.
5) RISC must use instruction pipeline technology, and most instructions are completed within one clock cycle.
6) Mainly based on hard-wiring control, without or less micro-program control.
7) Pay special attention to compilation optimization to reduce program execution time.
It is worth noting that from the perspective of command system compatibility, most CISCs can achieve software compatibility, that is, high-end machines contain all the instructions of low-end machines and can be expanded. However, RISC simplifies the instruction system, the number of instructions is small, and the format is different from that of old machines, so most RISC machines are not compatible with old machines. Since RISC has stronger practicability, it should be the development direction of future processors. But in fact, in today's era, Intel almost dominates the world, and many early software were designed based on CISC, and pure RISC will not be compatible. In addition, modern CISC-structured CPUs have incorporated many RISC components, and their performance gap has become smaller and smaller. Complex instruction CSC can provide more functions, which is required by programming.
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1) RISC can make full use of the area of VLSI chip. Most CISC controllers are controlled by microprograms, and their control memory occupies more than 50% of the CPU chip area, while RISC controllers use combinational logic control, and their hard-wired logic only accounts for about 10% of the CPU chip area.
2) RISC can improve the operation speed even more. RISC has fewer instructions, addressing modes, and instruction formats. It also has multiple general-purpose registers and adopts pipeline technology, so the operation speed is faster, and most instructions are completed within one clock cycle.
3) RISC is easy to design, can reduce cost and improve reliability. The RISC instruction system is simple, so the machine design cycle is short; its logic is simple, so the reliability is high.
4) RISC is conducive to compiler code optimization. RISC has fewer instruction types and fewer addressing methods, making it easy for the compiler to select more effective instructions and addressing methods, and adjust the order of instructions appropriately to make code execution more efficient.
| Compare Items\Categories | CISC | RISC |
|---|---|---|
| command system | complex, huge | Simple and streamlined |
| instruction word length | Generally more than 200 pieces, | Generally less than 100 |
| number of instructions | not fixed | Fixed length |
| instruction pipeline | can be achieved in a certain way | must be achieved |
| object code | Difficult to optimize and compile to generate efficient object code programs | Using optimized compiler, the generated code is more efficient |
| control method | Most Microprogrammed Control | Most of them are controlled by combinatorial logic |
| Accessible instructions | no limit | Only load/store instructions |
| Execution time of various instructions | big difference | Most complete in one cycle |
| The frequency of use of each command | A big difference | are more commonly used |
| Number of general purpose registers | less | many |
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