statement
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abstract
foreword
Enterprise-level NVMe solid-state drives come with a large-capacity DRAM cache and are under power-off protection design. The PMR (Persistent Memory Region) space provides a memory-level read and write speed and a storage area where data will not be lost after power failure.
Toshiba's CM5 enterprise SSD already supports this feature.
1 concept
In addition to flash memory, most NVMe SSDs also have a large amount of DRAM. Most consumer-grade SSDs are DRAM-Less, that is, without DRAM, and mainly enterprise-grade SSDs are equipped with DRAM. The main purpose of DRAM is to act as a cache for the flash translation layer table, which is used to track the mapping between logical block addresses and physical flash addresses. But NVME has been exploring other ways to use DRAM. The 1.2 specification introduced a controller memory buffer, which allows some SSDs' DRAM to be directly accessed through the PCI address space. This allows the IO command submission and completion queues to be located in the SSD's memory rather than the host CPU's memory, which reduces latency on the submission side and eliminates some of the inconsistencies in NVMe in the structure of peer-to-peer DMA between the SSD and the network. necessary