Operating System - Device Management

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Keyboard can be said to be our most common The input hardware device is used, but as a programmer, do you know " what happens during the operating system when the A letter is typed on the keyboard "?

device controller

Our computer equipment can be connected to a lot of input and output devices, such as keyboards, mice, monitors, network cards, hard disks, printers, speakers, etc. The usage and functions of each device are different, so how does the operating system put these input and output devices? What about unified management?
In order to shield the differences between devices, each device has a component called Device Control . For example, hard disks have hard disk controllers, monitors have video controllers, and so on.


Because these controllers clearly know the usage and function of the corresponding device, the CPU deals with the device through the device controller.
The device controller has a chip that can execute its own logic and has its own registers to communicate with the CPU, such as:

• By writing to these registers, the operating system can command the device to send data, receive data, turn it on or off, or perform some other action.
• By reading these registers, the operating system can know the state of the device, whether it is ready to receive a new command, etc.

In fact, the controller has three types of registers, they are the status register ( Status Register ) , the command register ( Command Register ) and the data register ( Data Register ) , as shown below:


The role of these three registers:

• In the data register , the CPU writes the data to be transmitted to the I/O device. For example, if the content to be printed is "Hello", the CPU must first send an H character to the corresponding I/O device.
• Command register , the CPU sends a command to tell the I/O device to perform input/output operations, so it will be handed over to the I/O device to work. After the task is completed, the status in the status register will be marked as completed.
• The purpose of the status register is to tell the CPU that it is already working or that the work has been completed. If it is already working, it is useless for the CPU to send data or commands until the previous work has been completed and the status register is marked as completed. , the CPU can send the next character and command.

The CPU controls the device by reading and writing the registers in the device controller, which is much more convenient and standard than the CPU directly controlling the input and output devices.

In addition, input and output devices can be divided into two categories: block devices ( Block Device ) and character devices ( Character Device ) .

• Block devices store data in fixed-size blocks, and each block has its own address. Hard disks and USB are common block devices.
• The character device sends or receives a character stream in units of characters. The character device is not addressable and does not have any seek operation. The mouse is a common character device.

Block devices usually transfer a very large amount of data, so the controller sets up a readable and writable data buffer .

• When the CPU writes data to the buffer of the controller, it will only send it to the device when the buffer has enough data.
• When the CPU reads data from the buffer of the controller, it also needs to store a part of the buffer before copying it to the memory.

This is done to reduce the number of operations on the device.
How does the CPU communicate with the device's control registers and data buffers? There are two methods:

• Port I/O , each control register is assigned an I/O port, and these registers can be manipulated through special assembly instructions, such as in/out and similar instructions.
• Memory-mapped I/O , which maps all control registers into memory space, so that data buffers can be read and written just like memory is read and written.
  

I/O control method

I know in the front that each device has a device controller, the controller is equivalent to a small CPU, it can handle some things by itself, but there is a problem, when the CPU sends an instruction to the device, let the device controller go Read the data of the device, how to notify the CPU when it finishes reading?

The controller's registers generally have status flag bits to indicate whether an input or output operation is complete. So, we thought of the first method of polling and waiting , and let the CPU keep checking the state of the register until the state is marked as complete. Obviously, this method is very stupid, and it will take up all the time of the CPU.

Then we think of the second method- interrupt , which informs the operating system that the data is ready. We usually have a hardware interrupt controller . When the device completes the task, it triggers an interrupt to the interrupt controller, and the interrupt controller notifies the CPU that an interrupt has occurred. The CPU needs to stop the current thing to handle the interrupt.

In addition, there are two kinds of interrupts, one is soft interrupt , for example, the code calls the INT instruction to trigger, and the other is hardware interrupt , which is triggered by hardware through the interrupt controller.

However, the interrupt method is not friendly to disks that frequently read and write data, so that the CPU is easily interrupted frequently, which will take up a lot of CPU time. The solution to the problem of this type of device is to use the DMA ( Direct Memory Access ) function, which enables the device to put the device I/O data into the memory by itself without the participation of the CPU. In order to realize the DMA function, the support of the "DMA controller" hardware is required.

DMA works as follows:

• The CPU needs to issue an instruction to the DMA controller to tell it how much data it wants to read, and the read data can be placed somewhere in the memory;
• Next, the DMA controller will issue an instruction to the disk controller, informing it to read data from the disk into its internal buffer, and then the disk controller will transfer the buffer data to the memory;
• When the operation of transferring the data to the memory by the disk controller is completed, the disk controller sends a successful confirmation signal to the DMA controller on the bus;
• After the DMA controller receives the signal, the DMA controller sends an interrupt to notify the CPU that the instruction is completed, and the CPU can directly use the ready-made data in the memory;

It can be seen that when the CPU wants to read the disk data, it only needs to send instructions to the DMA controller, and then go back to do other things. When the disk data is copied to the memory, the DMA control machine tells the CPU that the data has been Ready to read data from memory. CPU intervention is only required at the start and end of transfers.

device driver

Although the device controller shields many details of the device, the registers, buffers and other usage modes of the controller of each device are different, so in order to shield the difference of the "device controller", a device driver is introduced .


The device controller does not belong to the scope of the operating system, it belongs to the hardware, and the device driver belongs to the part of the operating system. The kernel code of the operating system can use the interface of the device driver like the local calling code, and the device driver is oriented to the device control. The code of the controller, which can operate the device controller only after it sends out the command to operate the device controller.
Although different device controllers have different functions, the device drivers will provide a unified interface to the operating system , so that different device drivers can access the operating system in the same way. As shown in the figure below:


I mentioned a lot of things about interrupts. When the device completes things, it will send an interrupt to notify the operating system. Then the operating system needs to have a place to handle the interrupt. This place is in the device driver. It will respond to the interrupt request sent by the controller in time, and call the interrupt handler to handle it according to the type of the interrupt.
Usually, when a device driver is initialized, an interrupt handler for the device must be registered first.


Let's take a look at the processing flow of the interrupt handler:

1. During I/O, if the device controller has prepared data, it will send an interrupt request to the CPU through the interrupt controller;
2. Protect the CPU context of the interrupted process;
3. Transfer to the corresponding device interrupt handler;
4. Interrupt processing;
5. restore the context of the interrupted process;

generic block layer

For block devices, in order to reduce the impact of differences in different block devices, Linux manages different block devices through a unified general block layer .
The general block layer is a block device abstraction layer between the file system and the disk drive. It has two main functions:

• The first function is to provide a standard interface for accessing block devices for file systems and applications, abstract various disk devices into a unified block device, and at the kernel level, provide a framework to manage these devices. driver;
• The second function, the general layer will also queue the I/O requests sent by the file system and the application, and then reorder the queue, request merging, etc., that is, I/O scheduling, the main purpose is to improve disk read and write s efficiency.

Linux memory supports five I/O scheduling algorithms, namely:

• no scheduling algorithm
• First-in-first-out scheduling algorithm
• Completely Fair Scheduling Algorithm
• priority scheduling
• Deadline Scheduling Algorithms

The first one, there is no scheduling algorithm, yes, you heard it right, it does not do anything with the I/O of the file system and the application, this algorithm is often used in virtual machine I/O, at this time the disk I/O scheduling The algorithm is handed over to the physical machine system.
The second is the first-in-first-out scheduling algorithm, which is the simplest I/O scheduling algorithm. The I/O request that enters the I/O scheduling queue first occurs first.
The third is the completely fair scheduling algorithm. Most systems use this algorithm as the default I/O scheduler. It maintains an I/O scheduling queue for each process and evenly distributes the time slices of each process. I/O request.
The fourth, priority scheduling algorithm, as the name suggests, I/O requests with high priority occur first, which is suitable for systems running a large number of processes, such as desktop environments, multimedia applications, etc.
The fifth, deadline scheduling algorithm, creates different I/O queues for read and write requests, which can improve the throughput of mechanical disks and ensure that requests that reach the deadline are prioritized, which is suitable for I/O Scenarios with high pressure, such as databases, etc.

Storage system I/O software layering

A lot of things have been mentioned earlier, devices, device controllers, drivers, and general block layers. Now, combined with the principle of the file system, let's take a look at the I/O software layering of the Linux storage system.

The I/O of the Linux storage system can be divided into three layers from top to bottom, namely the file system layer, the general block layer, and the device layer. Their entire hierarchical relationship is as follows:


The roles of these three levels are:

• The file system layer, including the implementation of the virtual file system and other file systems, provides a unified standard file access interface for applications upward, and stores and manages disk data through the general block layer downward.
• The general block layer, including the I/O queue and I/O scheduler of block devices, it will queue the I/O requests of the file system, and then select an I/O to send to the next layer through the I/O scheduler the device layer.
• The device layer, including hardware devices, device controllers, and drivers, is responsible for the I/O operations of the final physical device.

With the file system interface, you can not only operate the device through the command line of the file system, but also call the read and write functions through the application program to operate the device just like reading and writing files. Therefore, the device is only a special device under Linux. document.
However, in addition to read and write operations, device-specific capabilities and properties need to be checked. Therefore, the ioctl interface is needed, which represents the input and output control interface, and is a general interface for configuring and modifying the properties of a specific device.
In addition, the I/O of the storage system is the slowest part of the whole system, so Linux provides many caching mechanisms to improve the efficiency of I/O.

• In order to improve the efficiency of file access, various caching mechanisms such as page cache, inode cache, and directory entry cache are used to reduce direct calls to block devices.
• In order to improve the access efficiency of the block device, a buffer is used to cache the data of the block device.

What happens during the typing of letters on the keyboard?

Let's first take a look at the hardware architecture diagram of the


CPU: The memory interface in the CPU communicates directly with the system bus, and then the system bus is connected to an I/O bridge. This I/O bridge is connected to the memory bus on the other side. , which enables the CPU and memory to communicate. On the other side, an I/O bus is connected to connect I/O devices, such as keyboards, monitors, etc.

Then when the user inputs keyboard characters, the keyboard controller will generate scan code data and buffer it in the register of the keyboard controller, and then the keyboard controller will send an interrupt request to the CPU through the bus .

After the CPU receives the interrupt request, the operating system saves the CPU context of the interrupted process , and then calls the keyboard's interrupt handler .
The interrupt handler of the keyboard is registered when the keyboard driver is initialized. The function of the keyboard interrupt handler is to read the scan code from the buffer of the register of the keyboard controller, and then find the characters entered by the user on the keyboard according to the scan code. The input character is the display character, then the scan code will be translated into the ASCII code corresponding to the display character. For example, if the user enters the letter A on the keyboard, which is the display character, the scan code will be translated into the ASCII code of the A character.

After getting the ASCII code of the displayed character, it will put the ASCII code into the "read buffer queue", the next step is to display the displayed characters on the screen, and the driver of the display device will periodically read data from the "read buffer queue" Put it into the "write buffer queue", and finally write the data of the "write buffer queue" one by one to the data buffer in the register of the controller of the display device, and finally display the data on the screen.

After displaying the result, restore the context of the interrupted process .