foreword
The intel 8086 is a 16-bit CPU. The internal structure of the CPU is shown in the figure below. 
It can be seen that the data bus inside the CPU is 16 bits, but the address bus outside the 8086 is 20 bits, which means that the actual physical address of the 8086 is 1MB. There is an address adder in the BIU area, and the address line is changed from 16 bits to 20 bits after passing through this adder. So how does this process work? That's what this blog is about.
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Why segment management?
The data bus and segment registers inside the CPU are both 16-bit, and they are used as address registers to intelligently address 64KB units, but the actual physical address of the 8086 is 1MB. How to solve this problem? Use segmentation techniques.
What is segmentation technology?
The 1MB memory space is divided into several segments, the first address of each segment is called the segment head address, and the segment head address is used to represent the memory address of this segment. The first address of the segment must be divisible by 16, why? In this case, the first address of the segment can be stored in 16 bits, the lower 4 bits are all zero, and the upper 16 bits can be placed in the segment register.
A few concepts are introduced:
Logical address: The logical address is a pair, including the first address of the segment and the offset address, such as the code segment is represented as CS:IP.
Offset address: The offset relative to the first address of the segment, which is placed in the IP register.
Physical address: The actual memory address, represented by 20bit.
The first address of the segment is represented by segment registers, including CS (code segment), DS (data segment), SS (stack segment) and ES (additional segment). The offset address is represented by IP. As shown in FIG.
For example: if a memory address (physical address) is: 2304AH, the first address of the segment is 2304H. Then the logical address is: 2304H:000AH. The actual length of this section of memory can be represented by an offset, and the size is 0000H ~ FFFFH, which is 64KB.
So how does a logical address become a physical address? This is the problem mentioned in the preface. The formula is as follows:
physical address = corresponding register * 10H + offset within the segment
Still the example just now, 2304H * 10H = 23040H
23040H + 0000AH = 2304AH
in conclusion
The address adder performs such an operation: physical address = corresponding register * 10H + offset in the segment The
corresponding register refers to the values in the CS, DS, SS, and ES registers, and the offset in the segment refers to the IP register value inside. Such a 16 CPU can address 1MB of memory space.
References
Microcomputer Principle and Interface Technology
8086 Storage Mechanism
8086 Functional Structure