ZYNQ has three kinds of GPIO: MIO, EMIO, and AXI_GPIO.
Ug585 MIO & EMIO
1 、 MY
Multiuse I/O, multi-function IO interface, allocated in Bank0 and Bank1 of GPIO, belongs to the PS part of Zynq. There are 54 pins outside the chip. These pins can be used for GPIO, SPI, UART, TIMER, Ethernet, USB and other functions. Each pin has multiple functions at the same time, so it is called multi-function. These IOs are directly connected to the PS. There is no need to add pin constraints, the MIO signal is transparent to the PL part and is invisible. Therefore, the operation of MIO can be regarded as a pure PS operation.
xparameters.h
#define XPAR_PS7_GPIO_0_DEVICE_ID 0
#define XPAR_PS7_GPIO_0_BASEADDR 0xE000A000
#define XPAR_PS7_GPIO_0_HIGHADDR 0xE000AFFF
The base address of GPIO control and status register is: 0xE000_A000. The bottom layer of software operation under our SDK is the operation of the memory address space.
A GPIO port needs at least two registers, a general-purpose IO port control register for control and a general-purpose IO port data register for storing data.
GPxCON register is a control register, each bit of it corresponds to a pin, a bit of which is set to 0, the corresponding pin is an output pin, and when it is 1, it is an input pin.
GPxDAT is a data register. When a pin is set as an input, read this register to know whether the corresponding pin's level status is high or low. When the pin is set as an output, write this register to make the pin output high Level or low level.
Bank0 has 32 MIO pins, Bank1 has 22 MIO pins, 54 pins are directly connected to the PS through MIO, without hardware configuration, directly use SDK software for programming.
Understanding of GPIO
1. GPIO is a peripheral device used to observe and control the pins of the device.
2. MIO, which multiplexes the access from the PS peripheral and static memory interface to the PS pin.
3. GPIO can be independently and dynamically programmed as input/output and interrupt mode.
4. GPIO is divided into four banks.
5. The software controls the GPIO through a set of memory-mapped registers.
6. Register group:
(1) DATA_RO, used to reflect the state of the device pins.
(2) DATA, when GPIO is configured as output, this register can control the output value.
(3) MASK_DATA_LSW, used to shield the lower 16 bits of DATA.
(4) MASK_DATA_MSW, used to shield the upper 16 bits of DATA.
(5) DIRM, used to control whether the I/O pin is used as input or output, 0 is to enable input drive, and 1 is to enable output drive.
(6) OEN, when the I/O is configured as an output, this register is used to turn on/off the output enable, 0 is to turn off the input enable, and 1 is to turn on the output enable.
7. MIO[8:7] is used as the VMODE pin during system reset to configure the voltage of the MIO Bank. After reset, it can only be used as an output signal.
How to start GPIO
1. Initialize the GPIO driver
2. Set the GPIO direction to output.
3. Set output enable (assign 1 to pin10).
4. Write output to GPIO pin.
MIO control led light code
#include<stdio.h>
#include "xparameters.h"
#include "xgpiops.h"
#define GPIO_DEVICE_ID XPAR_XGPIOPS_0_DEVICE_ID
#define MIO0_LED 0
XGpioPs_Config *ConfigPtr;
XGpioPs Gpio;
main()
{
printf("GPIO TEST\n");
/* 初始化GPIO */
ConfigPtr = XGpioPs_LookupConfig(GPIO_DEVICE_ID);
XGpioPs_CfgInitialize(&Gpio, ConfigPtr,ConfigPtr->BaseAddr);
/* Set GPIO direction to output*/
XGpioPs_SetDirectionPin(&Gpio,MIO0_LED, 1);
/* Set output enable (assign pin10 to 1) */
XGpioPs_SetOutputEnablePin(&Gpio,MIO0_LED, 1);
/* Write output to GPIO pin*/
XGpioPs_WritePin(&Gpio,MIO0_LED, 0x1);
}