1. Development Tools
PL -> Vivado
PS (ARM) -> SDK (Xilinx) or third-party ARM development tools
2. The development steps
- System architect determines the hardware - software partitioning scheme, i.e., to determine which parts of the system into PL (programmable logic) and hardware acceleration, achieved in which parts PS (processor system) with software;
- Hardware engineer is assigned to the processing function hardware, and converts them or designed IP cores (Verilog / VHDL, may also be implemented Vivado HLS C / C ++ HLS);
- Vivado IP Integrator created using the embedded system modular design, including the development of required data moving tool (AXI-DMA, AXI Memory Master, AXI-FIFO, etc.), and a connection to the PS AXI PL IP interfaces (GP, HP, and ACP), then introduced into the SDK this project;
- Software engineers use the driver and application development SDK PS to the ARM processor.
3. Living
Vivado IP-based design, called blockdesign (BD), the existing IP call, prepared by the user into a logic module also encapsulated IP, and then connect the module blcok.
Logical development is completed, then go SDK, SDK will call the appropriate internal drive Vivado code based hardware design is provided. (PL hanging portion corresponding to a peripheral bus ARM AXI etc.)