FPGA learning - image and video acquisition and processing based on zynq

Figure 1: A typical image processing framework based on zynq system

According to the data flow direction of the system to read the external video data information, it is divided into three parts from the functional level of software and hardware:
1) Acquisition part : the video is collected by the 5 million pixel cmos camera located on the PL side, and the EMIO pin is led out from the ps side to configure the cmos camera by implementing the sccb protocol through software. Send the collected image data into the PL and use the image acquisition module packaged by verilog programming to integrate the data bit width into 24 bits.
2) Hardware acceleration part : transfer the rgb data format to the image preprocessing module to realize various preprocessing of rgb pixel information, such as grayscale, filter, edge, etc. This module can use the HLS tool of Xilinx to realize the rapid customization of various image preprocessing IP cores through C language programming. The hardware acceleration function is realized on the PL side to improve the real-time performance of image processing.
3) Storage transmission module : The AXI_DMA_WR write channel exchanges data with the DDR of the PS terminal through the HP port for high-level data exchange, and transmits the processed video data to the memory chip for storage. Finally, the PS terminal sends out a read signal to control the AXI_DMA_RD read channel to read out the image data in the memory and buffer it to the FIFO module at the PL terminal.
4) High-definition display module : realize the drive logic of the HDMI interface, and complete the image display function. 

Figure 2: A typical example of image processing based on a zynq system

It can be seen from the above that for the development of zynq-based image systems, the channel interconnection inside the SOC can be developed using the IP core that comes with xilinx. What we need to do is image sensor data interface control, image processing algorithm IP design, and display module design. The development of these three parts is the key.

In the follow-up, I will give my own learning results for these parts. stay tuned!


 

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Origin blog.csdn.net/weixin_41895751/article/details/122472258