Struggling Child Series FPGA Learning Altera Series: The fourth project opening method and the detailed operation of the new verilog file
Author: Xu Hao Shuai struggling child (please indicate the source)
Hello heroes, welcome to the FPGA technology arena, the rivers and lakes are huge, meeting is fate. Heroes can pay attention to the FPGA technology arena, get other interested resources in the "Crossing the Rivers and Lakes" and "Xing Xia Zhanyi" column, or cook together.
Today, we bring the "FPGA learning series altera" series to Heroes, which will continue to be updated.
This learning experience is written by me before, the design software used is Quartus II 13.1, the new version of Quartus has been updated to 20+, the following is only for beginners to learn reference. Other series will be updated in the future, so stay tuned. Not much to say, get the goods.
The fourth project opening method and the detailed operation of the new verilog file
When we use Quartus II for FPGA design, we must operate in the Quartus II project, otherwise some will be useless. So how do we open a newly built project? There are several ways:
Three ways to open the project:
1. Find the project file and double-click it.
It must be noted that the project file is pointed to by the red arrow. Only by double-clicking it can we project.
2. Open the project in Quartus II.
1. Click file and select open project.