STM32F103ZET6 GPIO working principle
Article Directory
- STM32F103ZET6 GPIO working principle
- Preface
- One, chip introduction
- 2. GPIO input and output mode
- 3. Basic structure
- Four, register principle
-
- 1. Port configuration low register (GPIOx_CRL)
- 2. Port configuration high register (GPIOx_CRH)
- 3. Port input data register (GPIOx_IDR)
- 4. Port output data register (GPIOx_ODR)
- 5. Port bit setting/clearing register (GPIOx_BSRR)
- 6. Port bit clear register (GPIOx_BRR)
- 7. Port configuration lock register (GPIOx_LCKR)
- to sum up
Preface
The learning of STM32 can be divided into 3 versions.
1. Register version
2. Library function version
3. HAL library version
Due to personal reasons, I choose the library function version to learn STM32.
Tip: Problems such as software installation will not be explained! ! !
One, chip introduction
The STM31F103ZET6 chip has 144 pins, of which there are 7 groups of I0 ports, one group of IO ports has 16 IOs, and a total of 16×7=112 IOs.
2. GPIO input and output mode
3. Basic structure
Four, register principle
1. Port configuration low register (GPIOx_CRL)
2. Port configuration high register (GPIOx_CRH)
3. Port input data register (GPIOx_IDR)
4. Port output data register (GPIOx_ODR)
5. Port bit setting/clearing register (GPIOx_BSRR)
6. Port bit clear register (GPIOx_BRR)
7. Port configuration lock register (GPIOx_LCKR)
to sum up
It has been changed, forgive me! ! !