The data flow of the instruction cycle: The data flow is to sequentially access the data sequence according to the instruction requirements. At different stages of instruction execution, the sequence of data to be accessed sequentially is different. And for different instructions, their data streams are often different. 4
1.
Instruction fetch cycle The task of the instruction fetch cycle is to fetch the instruction code from the main memory according to the content in the PC and store it in the IR.
The data flow of the fetch cycle is shown below. The address of the instruction is stored in the PC. According to this address, the instruction is fetched from the memory unit and placed in the instruction register IR. When the instruction is fetched, the PC is increased by 1.
2. Indirect
address cycle The task of the indirect address cycle is to fetch the effective address of the operand. Taking the one-time indirect address as an example, the address code in the instruction is sent to the MAR and sent to the address bus. After that, the CU sends a read command to the memory to obtain the effective address and store it in the MDR.
3.
Execution cycle The task of the execution cycle is to generate execution results through ALU operations based on the opcode and operands of the instruction word in the IR. The execution cycle of different instructions is different, so there is no agreed data flow.
4.
Interrupt cycle The task of the interrupt cycle is to process interrupt requests. Assuming that the program breakpoint is stored in the stack, and SP is used to indicate the address of the top of the stack, and the pointer of the top of the stack is modified first, and then the data is stored in the stack operation, the data flow is as follows:
The data flow of the interrupt cycle is as follows:
