illustrate
F-Tile global Avalon® memory mapped interface Intel FPGA IP has been retired starting with Intel® Quartus® Prime Pro Edition software 23.2 and later. If you instantiated the F-Tile Global Avalon Memory Map Interface Intel FPGA IP in an older Intel® Quartus® Prime Pro Edition software version design. When upgrading it to version 23.2 or higher, you will see the following warning message:
"Critical warning: The F-Tile global Avalon memory mapped interface IP will be discontinued with Quartus version 23.2. If the F-Tile global Avalon memory mapped interface IP is not used and the F-Tile auto-negotiation and link are instantiated in the design Training For Ethernet Intel FPGA IP instantiations, please ignore this warning and refer to the F-Tile Global Avalon Memory Mapped Interface KDB for more details. Otherwise, update your design implementation to use the local memory mapped interface to access Avalon.
Solution
To fix this critical warning issue, you need to
- Using Intel® Quartus® Prime Pro Edition software 23.1 and earlier,
- Or remove the F-Tile global Avalon memory mapped interface Intel FPGA IP from the design and access it using the local Avalon memory mapped interface, for example:
- In F-Tile PMA/FEC Direct PHY Intel® FPGA IP, the Datapath Avalon Memory Mapped Interface and PMA Avalon Memory Mapped Interface are available
- In F-Tile Ethernet Intel® FPGA Hard IP, you can use the Ethernet reconfiguration interface and the transceiver reconfiguration interface.