GPIO port mode register (GPIOx_MODER) (x = A..I)

#define HDC_SDA_IN () {GPIOC-> MODER & = ~ (3 << (9 * 2)); GPIOC-> MODER | = 0 << 9 * 2;} // PC9 input mode  

#define HDC_SDA_OUT() {GPIOC->MODER&=~(3<<(9*2));GPIOC->MODER|=1<<9*2;} //PC9输出模式

By reference manual, see GPIO registers, as shown below:

 

 O mode operation explanation:

HDC_SDA_IN() ：

          GPIOC-> MODER & = ~ (3 << (9 * 2)); // 3 is represented as binary 11, the left 2 11 * 9 = 18 (manufactured by 2y: configuration bits determine the port 9 2y + 1, ie bits 19, 18), the inverse to the GPIOC-> MODER; this is such GPIOC-> MODER of 19, 18-bit register is cleared.

          GPIOC-> MODER | = 0 << 9 * 2; // 0 left 2 9 * = 18, i.e., 18/19 configuration bit set to 0; the port 9 configured to implement the operation input mode

HDC_SDA_OUT() ：

          GPIOC-> MODER & = ~ (3 << (9 * 2)); // 3 is represented as binary 11, the left 2 11 * 9 = 18 (manufactured by 2y: configuration bits determine the port 9 2y + 1, ie bits 19, 18), the inverse to the GPIOC-> MODER; this is such GPIOC-> MODER of 19, 18-bit register is cleared.

          GPIOC-> MODER | = 1 << 9 * 2; // 01 * 9 2 left = 18, i.e. 19, 18 set to configuration bit 01; the port 9 configured to implement the operation output mode