Fun privileged students Zynq serial 44 - [ex63] MT9V034 image smoothing process camera
1 System Overview
As shown, this is the overall block diagram of a video capture system. Initial power, FPGA register is required by the initial configuration of the CMOS Sensor IIC interface. These basic parameters initialized, i.e., initialization initialization data corresponding to the address is stored in a pre-configured within the FPGA chip ROM good. After the initial configuration, CMOS Sensor can continuously output a standard RGB video data stream, FPGA by its synchronizing signal, such as a clock, line and field frequency is detected, so that the real-time image data acquired from the data bus. MT9V034 default initialization camera can output normal video data stream, and therefore the FPGA practically without any initial configuration IIC.
Inside the FPGA, to capture video data through a FIFO, to convert the data stream synchronized to the original frequency of 25MHz at a frequency of 50MHz. This data is then fed into the re-write cache DDR3 asynchronous FIFO, the data in this FIFO once they reach a certain number, it will AXI HP0 DDR3 bus write through. At the same time, AXI HP0 DDR3 cache bus will read image data into the FIFO buffer, and finally sent to the LCD display driver module. LCD driver module continually requesting read image data, and drives the liquid crystal display to display a video image.
In addition to this example, the aforementioned image flow and do DDR3 cache display the original image, the original image will be in the cache before DDR3, do additional image line buffer and the plurality of smoothing algorithm to obtain a new smoothed, and the image stream by AXI HP1 bus writes to the DDR3. AXI HP1 bus request will be based on the LCD display module, the image reading processing is displayed. Finally on the VGA liquid crystal display, can see the left image is the original image, the right image is the image after smoothing processing pass.
2 image smoothing and filtering
2.1 基本概念
从统计学的观点来看，凡是统计特征不随时间变化的噪声称为平稳噪声，而统计特征随
时间变化的噪声称为非平稳噪声。幅值基本相同，但是噪声出现的位置是随机的，称为椒盐
噪声；如果噪声的幅值是随机的，根据幅值大小的分布，有高斯型和瑞利型两种，分别称为
高斯噪声和瑞利噪声。
图像滤波，即在尽量保留图像细节特征的条件下对目标图像的噪声进行抑制，是图像预
处理中不可缺少的操作，其处理效果的好坏将直接影响到后续图像处理和分析的有效性和可
靠性。
消除图像中的噪声成分叫作图像的平滑化或滤波操作。信号或图像的能量大部分集中在
幅度谱的低频和中频段是很常见的，而在较高频段，感兴趣的信息经常被噪声淹没。因此一
个能降低高频成分幅度的滤波器就能够减弱噪声的影响。
图像滤波的目的有两个，一是抽出对象的特征作为图像识别的特征模式；另一个是为适应图像处理的要求，消除图像数字化时所混入的噪声。而对滤波处理的要求也有两条，一是不能损坏图像的轮廓及边缘等重要信息；二是使图像清晰视觉效果好。
平滑滤波是低频增强的空间域滤波技术。它的目的有两类：一类是模糊；另一类是消除
噪音。空间域的平滑滤波一般采用简单平均法进行，就是求邻近像元点的平均亮度值。邻域的大小与平滑的效果直接相关，邻域越大平滑的效果越好，但邻域过大，平滑会使边缘信息损失的越大，从而使输出的图像变得模糊，因此需合理选择邻域的大小。
关于滤波器，一种形象的比喻法是：我们可以把滤波器想象成一个包含加权系数的窗口，
当使用这个滤波器平滑处理图像时，就把这个窗口放到图像之上，透过这个窗口来看我们得
到的图像。举一个滤波在我们生活中的应用：美颜的磨皮功能。如果将我们脸上坑坑洼洼比作是噪声的话，那么滤波算法就是来取出这些噪声，使我们自拍的皮肤看起来很光滑。
2.2 滤波算法
各种不同的滤波算法如下：
•限幅滤波法（又称程序判断滤波法）
• 中位值滤波法
• 算术平均滤波法
• 高斯滤波法
• 递推平均滤波法（又称滑动平均滤波法）
• 中位值平均滤波法（又称防脉冲干扰平均滤波法）
• 限幅平均滤波法
• 一阶滞后滤波法
• 加权递推平均滤波法
• 消抖滤波法
• 限幅消抖滤波法
•卡尔曼滤波（非扩展卡尔曼）
2.3 均值滤波
均值滤波器是图像处理中一种常见的滤波器，它主要应用于平滑噪声。它的原理主要是利用某像素点周边像素的平均值来达到平滑噪声的效果。
例如，1~8像素是（x,y）点周围邻近的8个像素点。最简单的均值滤波，即对（x,y）以及周边8个像素点求平均替代原来的（x,y）点。
这种滤波方式的优点很明显，算法简单，计算速度快。缺点是降低噪声的同时使图像产生模糊，特别是景物的边缘和细节部分。
2.4 加权均值滤波器
由于我们已经注意到了中心点和周边像素点的重要程度不同，因此可以将均值滤波进行改进，获得图像平滑滤波效果的同时，也在一定程度上尽量降低图像边缘和细节的损失。
基于1/16的加权均值滤波，我们的Matlab代码如下：
clear
clc
I1=imread(’.\lena.jpg’);
I=im2double(I1);
[m,n,c]=size(I);
A=zeros(m,n,c);
% 1 2 1
% 1/16 * 2 4 2
% 1 2 1
%for R
for i=2:m-1
for j=2:n-1
A(i,j,1)=I(i-1,j-1,1)+I(i+1,j-1,1)+I(i-1,j+1,1)+I(i+1,j+1,1)+2I(i+1,j,1)+2I(i-1,j,1)+2I(i,j+1,1)+2I(i,j-1,1)+4*I(i,j,1);
end
end
%for G
for i=2:m-1
for j=2:n-1
A(i,j,2)=I(i-1,j-1,2)+I(i+1,j-1,2)+I(i-1,j+1,2)+I(i+1,j+1,2)+2I(i+1,j,2)+2I(i-1,j,2)+2I(i,j+1,2)+2I(i,j-1,2)+4*I(i,j,2);
end
end
%for B
for i=2:m-1
for j=2:n-1
A(i,j,3)=I(i-1,j-1,3)+I(i+1,j-1,3)+I(i-1,j+1,3)+I(i+1,j+1,3)+2I(i+1,j,3)+2I(i-1,j,3)+2I(i,j+1,3)+2I(i,j-1,3)+4*I(i,j,3);
end
end
B=A/16;
%output
imwrite(B,‘lena.tif’,‘tif’);
imshow(’.\lena.jpg’);title(‘origin image’);figure
imshow(‘lena.tif’);title(‘image after average filter’)
滤波效果如下。
Matlab源码、Lena.jpg原图和比对图存放在project\zstar_ex63\matlab文件夹下。
3 FPGA-based image smoothing
project folder project \ zstar_ex63 \ zstar.srcs \ sources_1 \ average_filter.v module implemented in the new weighted mean image filtering processing 1/16. The functional block diagram is used two the FIFO, for buffering longitudinal rows, three data streams enter into the image processing are the image of the n-1 th, n-th row and row n + 1, the control input data stream and two image FIFO buffer in the same location, register values before and after the image pixels are two caches, so that the center pixel can be realized and the preceding column, data synchronization processing between the uplink and downlink.
4 assembly instructions
MT9V034 camera module is connected to the board through the developing Zstar Zynq Zstar ISB plate (P3), VGA is also connected through the backplane Zstar ISB Zstar Zynq development board, VGA board also need to be connected to a VGA monitor. Connection schematically shown in FIG.
5 board-level debugging
of the present example corresponds ex63 example project, has produced a good BOOT.bin placed in the project path "zstar_ex63 \ zstar.sdk \ BOOT". You can also refer to the document "Fun Zynq- example piece: [ex51] BOOT.bin.pdf startup file production program running naked" file produced comprising BOOT.bin .bit file, copy it to the TF card inserted development Zstar slot plate, make the connection assembly, a power, you can see about VGA display simultaneously displays two images, the original image is a left image, right image after image smoothing process.
