A memory type
1, RAM, random access memory (Random Access Memory), also known as main memory,
a CPU and a direct cross
exchange internal data memory. You may read and write addresses, data is lost after power-down.
( 1 ) a DRAM: dynamic RAM, the logic used to charge capacitors represent 0 and 1 , the charge and discharge characteristics of the capacitor leading to the need to constantly refresh to ensure that data is not lost. Larger memory capacity, multi for data storage. Common are SDRAM and DDR. ( 2 ) the SRAM: Static RAM, using triggers two stable states to represent a logic 0 and 1 , no refresh operation. Storage capacity is generally small, but fast read and write speeds.
2, ROM, read-only memory (Read Only Memory), data can only be read from but not written, data is not lost after a power failure. Certain conditions need to write data, data access is slow.
( . 1 ) a PROM: programmable ROM, may be modified after shipment internal data, but can only be modified once. It is not used for storing the modified data, such as device ID, a manufacturer code. ( 2 ) the EEPROM: Electrically Erasable ROM, a repeated internal data can be modified. Used for data after power-down throw to be stored.
3, Flash, a flash memory (Flash Memory), read-write, data is not lost after a power failure, the data access speed.
( . 1 ) the NOR FLASH: small capacity, read and write speed, the program can be run directly on the inside. ( 2 ) the NAND FLASH: capacity, slow read and write, read and write data in blocks, typically 512 Byte, can operate on a single byte.
Two, SDRAM Profile
SDRAM is full Synchronous Dynamic Random Access Memory, i.e., synchronous dynamic random access memory, working memory means synchronized clocks need to be synchronized, need to constantly refresh the dynamic assignment to ensure that data is not lost, randomly assigned address data reading operation can be developed. SDRAM memory data is the use of capacitive charge can be held and the charge and discharge characteristics. SDRAM memory having a large space, read and write speed, relatively cheap and so on. However, due to the internal capacitance to store data using the SDRAM, in order to ensure data is not lost, the respective storage capacitor requires continuous refresh operation; at the same time the need to consider the reader management ranks, delay and other various operations, thereby resulting in its control logic complex features.
1, SDRAM memory computing
Internal SDRAM is a memory array, like a table, when we write data to this table, you need to specify a row (Row), and then specify a column (Column), you can accurately find the required the "cell", which is the basic principle of SDRAM addressing. Figure "cell" SDRAM memory chip is a memory cell, and the "Table" (memory array) we call L-Bank.
通常 SDRAM 的存储空间被划分为 4 个 L-Bank，在寻址时需要先指定其中一个 L-Bank，然后在这个选定的 L-Bank 中选择相应的行与列进行寻址（寻址就是指定存储单元地址的过程）。对 SDRAM 的读写是针对存储单元进行的，对 SDRAM 来说一个存储单元的容量等于数据总线的位宽，单位是 bit。那么 SDRAM 芯片的总存储容量我们就可以通过下面的公式计算出来：SDRAM总存储容量 = 行数 × 列数 × L-Bank的数量 × 存储单元的容量
本次设计采用的 SDRAM 芯片为 Winbond W9812G6KH - 6，查询数据手册发现其容量为：2M × 4 banks × 16 bits = 128 Mbit，其中 2M 为“行数×列数”，4为 L-Bank 数量，16 为单个存储单元的容量，即数据位宽。因此每个 Bank 能存储 32 Mbit（33554432 bit）的数据，这些数据组成 4096行 x 512列，每个存储单元存储 16bit 的数据。
2、SDRAM存取原理
SDRAM存储数据是利用了电容的充放电特性以及能够保持电荷的能力。一个 1bit 的存储单元的结构如下图所示，它主要由行列选通三极管，存储电容，刷新放大器组成。行地址与列地址选通使得存储电容与数据线导通，从而可进行放电（读取）与充电（写入）操作。
SDRAM 存储数据是利用了电容能够保持电荷以及其充放电的特性。对于这 1 bit 的的数据，首先需要打开行地址线，然后打开列地址线，选中存储单元。接着打开行选通三极管，再打开列选通三极管，对存储电容进行放电，电容的电平状态就能呈现在位线上，即实现了数据读取。当位线的的电平值送到存储电容上，对存储电容进行充电，就实现了数据写入。刷新放大器的作用是将电容放大，便于传输。
三、SDRAM器件引脚
SDRAM 功能框图如下所示：
其引脚功能如下表所示：
四、操作命令
对 SDRAM 的操作是通过命令来控制的，这些命令由 CS_n、RAS_n、CAS_n、WE_n 组合而成。同时，A 和 DQM 作为辅助信号，共同组成 SDRAM 的操作命令。
并非所有命令都会用到，后面用到某些命令时，我们再详细讲解。
参考资料：[1]威三学院FPGA教程
[2]正点原子FPGA教程
[3]袁玉卓, 曾凯锋, 梅雪松. FPGA自学笔记：设计与验证[M]. 北京航空航天出版社, 2017.