Litchi send zero from welding to run from linux

step

Welding flash chips (if more than 16M, the need to change the source programming tool) 
solder pin, in order to see the serial data

Welding flash chip, to note the position of No. 1 pin, flash chip development board at the back, pin No. 1 is the position of the side close to the microphone

 

The following is a compilation step related, reference connection , note that the download source, spi flash mode selection

uboot

SPI-V3S clone -b Git-Experimental HTTPS: // github.com/Lichee-Pi/u-boot.git 

the make the ARCH = = the CROSS_COMPILE ARM ARM-Linux-gnueabihf- menuconfig 
Architecture SELECT , selected from the ARM 
Device the Drivers 
    the SPI Support the Flash 
    Hook choose the name of the manufacturer's own flash, where the election Macronix SPI flash support 
    If you use more than 16MB flash, check the flash bank needs support options, otherwise it can only read 16MB
code include / configs / sun8i.h, add xxx before include
#define CONFIG_BOOTCOMMAND   "sf probe 0; "                           \
                             "sf read 0x41800000 0x100000 0x10000; "  \
                             "sf read 0x41000000 0x110000 0x400000; " \
                             "bootz 0x41000000 - 0x41800000"

 #define CONFIG_BOOTARGS      "console=ttyS0,115200 earlyprintk panic=5 rootwait " \
                             "mtdparts=spi32766.0:1M(uboot)ro,64k(dtb)ro,4M(kernel)ro,-(rootfs) root=31:03 rw rootfstype=jffs2"

Compile

time make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- 2>&1 | tee build.log

 

Download linux kernel source

make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- licheepi_zero_defconfig
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- menuconfig

Select

The Drivers Device
     <*> Memory Device Technology (the MTD) Support
         <*> the Command Line Partition Table parsing the project to parse flash uboot pass over the partition information.
        <*> SPI- NOR Device Support 
File Systems
     <*> Miscellaneous filesystems
         <*> Journalling Flash File System v2 (JFFS2) Support
code arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
&spi0 {
        status ="okay";

        mx25l25635e:mx25l25635e@0 {
                compatible = "jedec,spi-nor";
                reg = <0x0>;
                spi-max-frequency = <50000000>;
                #address-cells = <1>;
                #size-cells = <1>;
        };

};

Compile

make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- dtbs
东西在在 arch/arm/boot/zImage

 

rootfs, get off before generating the file system directly mkfs.jffs2

sudo mkfs.jffs2 -s 0x100 -e 0x10000 -p 0x1AF0000 -d ~/downloads/rootfs/ -o ../jffs2.img

 

Packaged mirror

dd if=/dev/zero of=flashimg.bin bs=1M count=32
dd if=$HOME/dev/embedded/lichee/zero/SPI_Flash/u-boot/u-boot-sunxi-with-spl.bin of=flashimg.bin bs=1K conv=notrunc
dd if=$HOME/dev/embedded/lichee/zero/SPI_Flash/linux-zero-4.13.y/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dtb of=flashimg.bin bs=1K seek=1024  conv=notrunc
dd if=$HOME/dev/embedded/lichee/zero/SPI_Flash/linux-zero-4.13.y/arch/arm/boot/zImage of=flashimg.bin bs=1K seek=1088  conv=notrunc
dd if=$HOME/dev/embedded/lichee/zero/SPI_Flash/jffs2.img of=flashimg.bin  bs=1K seek=5184  conv=notrunc

 

Burned firmware

git clone -b spi-rebase https://github.com/Icenowy/sunxi-tools.git

Repair written question of more than 16M

code fel-spiflash.c, search

#define CMD_WRITE_ENABLE 0x06
和
aw_fel_spiflash_write_helper函数

Into the following section

#define CMD_WRITE_ENABLE 0x06 部分,改成如下
#define CMD_WRITE_ENABLE 0x06
#define SPI_FLASH_16MB_BOUN  0x1000000
# define CMD_BANKADDR_BRWR              0x17    //only SPANSION flash use it
# define CMD_BANKADDR_BRRD              0x16
# define CMD_EXTNADDR_WREAR             0xC5
# define CMD_EXTNADDR_RDEAR             0xC8
size_t bank_curr = 0;

void aw_fel_spiflash_write_helper(feldev_handle *dev,
                  uint32_t offset, void *buf, size_t len,
                  size_t erase_size, uint8_t erase_cmd,
                  size_t program_size, uint8_t program_cmd)
{
    uint8_t *buf8 = (uint8_t *)buf;
    size_t max_chunk_size = dev->soc_info->scratch_addr - dev->soc_info->spl_addr;
    size_t cmd_idx, bank_sel;

    if (max_chunk_size > 0x1000)
        max_chunk_size = 0x1000;
    uint8_t *cmdbuf = malloc(max_chunk_size);
    cmd_idx = 0;

    prepare_spi_batch_data_transfer(dev, dev->soc_info->spl_addr);
    //add bank support
    {
    cmd_idx = 0;
    bank_sel = offset /SPI_FLASH_16MB_BOUN;
    if (bank_sel == bank_curr)
        goto bar_end;

    /* Emit write enable command */
    cmdbuf[cmd_idx++] = 0;
    cmdbuf[cmd_idx++] = 1;
    cmdbuf[cmd_idx++] = CMD_WRITE_ENABLE;
    /* Emit write bank */
    cmdbuf[cmd_idx++] = 0;
    cmdbuf[cmd_idx++] = 2;
    cmdbuf[cmd_idx++] = CMD_EXTNADDR_WREAR;
    cmdbuf[cmd_idx++] = offset >> 24;
    /* Emit wait for completion */
    cmdbuf[cmd_idx++] = 0xFF;
    cmdbuf[cmd_idx++] = 0xFF;
    /* Emit the end marker */
    cmdbuf[cmd_idx++] = 0;
    cmdbuf[cmd_idx++] = 0;
    aw_fel_write(dev, cmdbuf, dev->soc_info->spl_addr, cmd_idx);
    aw_fel_remotefunc_execute(dev, NULL);
    bar_end:
        bank_curr = bank_sel;
    }
    
    cmd_idx = 0;

    while (len > 0) {
        while (len > 0 && max_chunk_size - cmd_idx > program_size + 64) {
            if (offset % erase_size == 0) {
                /* Emit write enable command */
                cmdbuf[cmd_idx++] = 0;
                cmdbuf[cmd_idx++] = 1;
                cmdbuf[cmd_idx++] = CMD_WRITE_ENABLE;
                /* Emit erase command */
                cmdbuf[cmd_idx++] = 0;
                cmdbuf[cmd_idx++] = 4;
                cmdbuf[cmd_idx++] = erase_cmd;
                cmdbuf[cmd_idx++] = offset >> 16;
                cmdbuf[cmd_idx++] = offset >> 8;
                cmdbuf[cmd_idx++] = offset;
                /* Emit wait for completion */
                cmdbuf[cmd_idx++] = 0xFF;
                cmdbuf[cmd_idx++] = 0xFF;
            }
            /* Emit write enable command */
            cmdbuf[cmd_idx++] = 0;
            cmdbuf[cmd_idx++] = 1;
            cmdbuf[cmd_idx++] = CMD_WRITE_ENABLE;
            /* Emit page program command */
            size_t write_count = program_size;
            if (write_count > len)
                write_count = len;
            cmdbuf[cmd_idx++] = (4 + write_count) >> 8;
            cmdbuf[cmd_idx++] = 4 + write_count;
            cmdbuf[cmd_idx++] = program_cmd;
            cmdbuf[cmd_idx++] = offset >> 16;
            cmdbuf[cmd_idx++] = offset >> 8;
            cmdbuf[cmd_idx++] = offset;
            memcpy(cmdbuf + cmd_idx, buf8, write_count);
            cmd_idx += write_count;
            buf8    += write_count;
            len     -= write_count;
            offset  += write_count;
            /* Emit wait for completion */
            cmdbuf[cmd_idx++] = 0xFF;
            cmdbuf[cmd_idx++] = 0xFF;
        }
        /* Emit the end marker */
        cmdbuf[cmd_idx++] = 0;
        cmdbuf[cmd_idx++] = 0;

        /* Flush */
        aw_fel_write(dev, cmdbuf, dev->soc_info->spl_addr, cmd_idx);
        aw_fel_remotefunc_execute(dev, NULL);
        cmd_idx = 0;
    }

    free(cmdbuf);
}

make

 

Burn

Test whether a flash device discovery 
sunxi - FEL Version 
sunxi -Fel SpiFlash -p-Write 0 ~ / dev / Embedded / Lichee / ZERO / SPI_Flash / flashimg.bin

 

After re-power, it is not there to see the serial output it

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Origin www.cnblogs.com/ziyouchutuwenwu/p/11515978.html