Anti-jamming design and the specific circuit of the printed circuit board are closely related, there are several commonly used measures only in respect of PCB anti-jamming design to do some explanation.
1. Power line design
The current size of the printed wiring board, the rent power line width as far as possible, to reduce the loop resistance. Meanwhile, power supply line, ground line toward the same direction and data transmission, which helps enhance the noise immunity.
2. Ground Design
Design is the principle of ground;
(1) separately from the digital and analog. If the circuit board both have linear logic circuits that allow them to be separated. The low frequency circuit should be single point parallel ground, partially ground in series and then in parallel the actual wiring may be difficult. Multi-point high-frequency circuit should be connected in series to ground, the ground should be short and rent, high-frequency components as much as possible around a large area with a grid-like foil.
(2) grounding line should be bold. If the ground line is sewing lines, the ground potential varies with a change in current, so that the anti-noise performance. Ground line should therefore be thickened, so that it allows current to pass three times on the PCB. If possible, should be in the ground line 2 ~ 3mm or more.
(3) ground line constituting a closed loop. PCB only composed of digital circuits, the circuit ground fabric loop mostly agglomerated to improve noise immunity.
3. The decoupling capacitor configuration
One of the conventional PCB design approach is appropriate decoupling capacitors disposed in the respective key parts PCB. Configuring general principle of decoupling capacitors is:
(1) Power input connected across the electrolytic capacitor 10 ~ 100uf. If possible, take more than 100uF better.
(2) In principle, each integrated circuit chip arrangement should 0.01pF of a ceramic capacitor, in case of insufficient void PCB, every 4 to 8 can be arranged, but the chip capacitor is a 1 ~ 10pF.
(3) resistance to low noise, large power shutdown device changes, such as the RAM, ROM memory devices, decoupling capacitors should be connected directly between the chip power and ground.
(4) the lead capacitance can not be too long, especially in a high frequency bypass capacitor can not have a lead. Furthermore, it should be noted that the following two points:
(1 contact, relays, buttons and other elements of the PCB. They will produce a larger spark discharge operation, the RC circuit shown in the drawings to absorb a discharge current must be used. Usually R taken 1 ~ 2K, C take 2.2 ~ 47UF.
(High input impedance 2CMOS, and vulnerable to induction, so the use of no end to ground or positive supply. More on PCB-related knowledge to do in the Czech Republic with the official website www.jiepei.com/G602, welcome to learn together !