Yesterday asked a group of students count originally Redbook final exam are the original title, and then order a bit earlier chapters
Yesterday the word back the amount 150
Okay during the day, work at night to break up, ready two weeks to review the finished sorting computer composition principle, two weeks after the main data structure with a look Principles of Computer
Specific task today to write essays
Introduction Chapter One computer
- 1. What is the basic idea of von Neumann computer architecture is that? Click idea which parts of the computer hardware system design should be composed? What is the role they each play?
A: The basic idea: to store program instructions executed. Sequential storage
Components: The computer should include arithmetic, a memory, a controller, input and output devices five basic equipment
Action: a memory: to store programs and data element
Operator: information processing, arithmetic and logic operations
Controller: control information of the program memory after processing taken from the analysis, as required to other parts of the control information sent
Input device: the data conversion program and the computer can identify the coding sequence sent to the device
An output device: a computer processing the data, calculation results and other internal information output request for person
- 2. What is a CPU? What is the host? Why input and output device known as a peripheral device?
Central Processing Unit (CPU) is a VLSI, is a computing core and control core computer. Its main function is to explain the computer instructions and data processing computer software.
Host refers to a computer to remove the main body portion other than the input and output devices. Also for placing the control board and the housing of the other major components (container Mainframe). Generally comprises a CPU, memory, hard drive, optical drive, power supply, controller and other input and output interfaces.
Input-output device is a computer system implemented with people in other devices, systems or home device information exchange. Also known as I / O devices. External devices, peripherals.
- 3. How to understand the equivalence between hardware and software?
Can be implemented in hardware function in principle in software; functions implemented in software, in principle can also be implemented in hardware, this is the equivalent of the hardware and software. For example, the hardware may be direct multiplication, can be achieved with the addition and multiplication displaceable manner by software. Running the software can control the operation of the computer, the software may also be cured (e.g. the BIOS), operating directly in the ROM chip in the boot process by the hardware.
- 4. What is the relationship between hardware and software?
Computer hardware and software are interdependent and indispensable. Specifically: 1, the computer does not install the operating system software is bare metal, no use value. Hardware features impossible not to play 2, operating system software, but can not run without the computer hardware, operating out of the question. Without the support of the operating system, any other application software is not applicable. 3, is the foundation of computer hardware to run the software, the software is able to function hardware platform
- 5. What are the characteristics von Neumann architecture computers is? What are its limitations?
Von Neumann architecture computer is a typical computer organization, operator into the computer hardware, memory, a controller, an input member and an output member, using the stored program work. The main features of the external von Neumann architecture computer are:
(1) instruction and data words to be stored in the same manner as a memory, there is no difference, the word determined by the state of the memory alone from a computer is an instruction or data. ,, decoded instruction sent to the control unit calculates the data sent to the operator.
(2) instructions sequentially performed serially, centralized control by the control unit, using a PC counter addressing the instructions.
(3) memory cells of the given length is a one-dimensional linear space.
(4) the use of low-level machine language, data is presented in the form of two system. Included in the instruction opcode and two address code. Operand coding format can not be distinguished from the data itself.
(5) a single processor structure to the arithmetic unit as the center, only one instruction stream and data stream.
Limitations von Neumann architecture computer is its parallelism is very limited, not suitable for artificial intelligence and pattern recognition applications.
- 6. stored in the program memory data and how to distinguish?
Solution: computer to distinguish between instruction and data the following two methods:
l to distinguish between instructions and data over different time periods, i.e., at the instruction fetch stage (or fetch a microprogram) fetched instruction, the execution instruction stage (or the corresponding micro program) is the data taken.
distinguished by source address, by the PC to provide the storage unit is an instruction address fetched, the address provided by the instruction memory unit address code is fetched operand part.
Chapter 3 System bus
1. Why should the bus arbitration control?
A: In order to address the right to use when multiple components apply for bus allocation
2. What is the ruling bus? The bus arbitration, which has several ways?
A: bus arbitration: When using a non-dedicated bus, since there may be multiple devices or components simultaneously request the use of the bus by the bus should be controlled according to a certain priority order decision means, at the same time to ensure that only one high priority applicants the right to use the bus.
Bus arbitration ruling can be divided into centralized and distributed ruling two kinds.
Centralized control decision function is implemented using a bus dedicated member, the member may be located on a device connected to the bus. When a device needs to transmit data to the shared bus, it must request before sending the data when the permission. Decision means receives a bus use request signal from each device, wherein issuing a bus grant signal to a device.
Decision distributed control functions distributed among devices connected to the bus, it is common fixed priority. Each device is assigned a priority number, the device sent a bus request sent to its priority request line number, constituting a composite signal with the request signal of the other device, and the decision whether the synthesized signal reading is determined to have more priority high device application bus. This makes the device with the highest priority bus use right is obtained.
3. centralized bus arbitration, which has several ways? What are the characteristics of these buses rulings have?
A: mode: chain query mode: each application devices sharing a bus as the bus request signal line, the bus control device in response to the signal lines are connected in series between devices.
Timing counter query: equipment required by a common request line is issued using the bus, the bus controller according to the value of the art query each device.
Separate request method: each device has a separate bus request to the bus controller mode, the bus controller also sends a response signal to each device, respectively
Independent request may be combined in a grouping known as query and query chain
4. What is the difference between synchronous transfer mode and asynchronous transfer mode bus? What for each occasion with?
A: bus communication rules to achieve data transfer bus timing rules, i.e. bus protocol. In synchronous mode, all of the equipment timing information obtained from the same common clock signal, the transmission data is carried out at a common clock signal controls the operation of the bus by the fixed timing. In this way the timing relationship is simple, relatively simple to achieve, will help improve the bus transfer rate for each device in the system, a variety of bus operations and has been fixed toot occasion.
Instead of using asynchronous communication handshake clock signal, a bus cycle of operation is not fixed, each of the steps has a signal representation. Asynchronous bus cycle to allow a greater range of variation, the device may be adapted to a variety of operating speed, the disadvantage is more sensitive to noise
The analysis and induction centralized serial link, the timing of the query, and three kinds of independent bus request control advantages and disadvantages
two. Analysis of the question
1. Why should the bus arbitration control?
2. The same bus can not be both synchronous mode and asynchronous mode of communication, is it, and why?
A: semi-synchronous bus can, not only retains the characteristics of this type of bus synchronous communication, but also connected asynchronous response speed is large apparatus. By introducing the asynchronous bus clock signal, and its ready response signals and the like are rising or falling edge of the clock effective, without interference signals at other times, the use of the Wait, if invalid, then the data is not ready, the next clock comes when resampling Wait signal until detecting a valid, go fetch the data line data, PCI bus is also a synchronous bus all the time the mother half falling clock synchronization, the sampling rising edge of the bus clock signal at the beginning of the bus device.