Compilation of learning - the sixteenth day

Chapter XIV port

CPU can read and write data directly place:

Internal CPU registers
Memory unit
port

14.1 read and write ports

8-bit write port with data stored al, 16-bit write port, the data stored with ax

When within 0 to 255 to read and write port

in al,20h
out 20h,al

When read and write ports 256 to 65535, port numbers need to save dx

mov dx,3f8h
in al,dx
out dx,al

14.2 CMOS RAM

To access the address stored in the CMOS RAM unit: 70h address port

Data port 71h: storing data read from the selected cell CMOS EAM

（1）

assume cs:code
code segment
start:
    mov al,2
    out 70h,al
    in al,71h
    
    mov ax,4c00h
    int 21h
code ends
end start

（2）

assume cs:code
code segment
start:
    mov al,2
    out 70h,al
    mov al,0
    out 71h,al
    
    mov ax,4c00h
    int 21h
code ends
end start

14.3 shl and shr instruction

logical shift left instruction shl

logical shift right instruction shr

Features:

A left data register or memory unit / right shift
The removal of the last bit written in CF
The least significant bit / MSB keep up with 0

If you want to move one or more times by the need to preserve cl register

Checkpoint 14.2

assume cs:code
code segment
start:
    mov ax,66
    mov bx,ax
    shl ax,1
    mov cl,3
    shl bx,cl
    add ax,bx
    
    mov ax,4c00h
    int 21h
code ends
end start

Time information stored in 14.4 CMOS RAM

Storing the current time comprises: year, month, day, hour, minute, second, the length is 1 byte, storage unit

S: 0: 2: 4

Day: 7 Month: 8 Year: 9

Experiment 14 CMOS RAM access

the ASSUME CS: code 
Data segment 
    DB . 9 , . 8 , . 7 , . 4 , 2 , 0 
Data ends 
code segment 
Start: 
    MOV AX, Data 
    MOV DS, AX 
    MOV BX, 0b800h 
    MOV ES, BX 
    MOV DI, 160. * 12 is + 33 is * 2 
    Si MOV, 0 
    MOV CX, . 6 
    
S: 
    Call Show 
    
    CMP byte PTR DS: [Si], 7 
    JNA S1; no greater than 7 jumps 
    ; year, month 
    MOV byte PTR ES: [DI],' / ' 
    JMP STOP 
S1: 
    JB S2; jumps of less than 7 
    ; day 
    MOV byte PTR ES: [DI], '  ' 
    JMP STOP 
S2: 
    CMP byte PTR DS: [Si], 0 
    JE STOP; Jump equal to 0 
    ; hour, minute 
    MOV byte PTR ES: [DI], ' : ' 
    
STOP: 
    inc is Si 
    the Add DI, 2 
    Loop S 
    MOV AX, 4c00h 
    int 21H 
    
Show: 
    Push CX 
    MOV Al, DS: [Si] 
    OUT 70h, Al
     in Al , 71h 
     
    ; get data
    mov AH, Al 
    MOV Cl, . 4 
    SHR AH, Cl 
    and Al, 00001111b 
    
    ; to ASCII decimal 
    the Add AH, 30h 
    the Add Al, 30h 
    
    ; display buffer write 
    MOV ES: [DI], AH 
    MOV byte PTR ES: [DI + 2 ], Al 
    the Add DI, . 4 
    POP CX 
    RET 
    
code ends 
End Start

Chapter 15 external interrupts

15.1 interface chip and port

Input peripherals and memory are not fed directly to the CPU, but the first feeding port; the CPU is not directly input to the peripheral output peripherals, but into the first port, and then sent by the associated peripheral chips , the CPU can also control the output information to the peripheral, and the control commands are then sent to the relevant port of the chip, then the embodiment according to the command by the associated peripheral control chips.

Visible, CPU contact through ports and external devices.

15.2 external interrupt information

External interrupt sources are divided into:

Maskable interrupts: external CPU may not respond to the interrupt. sti, disposed IF = 1; cli, disposed IF = 0
Nonmaskable interrupt: The CPU must external interrupt. 2 is fixed to the interrupt type code

15.3 PC keyboard processing machine

1. Keyboard Input

General scan code generated when a key is pressed is called pass code, a release key scan code generated code is called off, a length of a scan code byte, bit 7 is 0 through code, bit 7 is broken code 1, namely: broken code = code through + 80h

2. triggered interrupt 9

When the keyboard input port 60h arrives, the relevant chip type will send an interrupt to the CPU 9 code maskable interrupt information. The CPU detects the information, if IF = 1, the interrupt response, otherwise maskable interrupt.

3. Do int9 interrupt routine

It BIOS keyboard buffer after the system starts, for storing BIOS interrupt int 9 keyboard input history memory area is received. The memory area 15 can store keyboard input, int 9 as an interrupt routine in addition to receiving the scan code, but also generates a corresponding ASCII code, therefore, in the buffer, a keyboard input means to store one word, bits of the scan code, lower character code.

inc and dec influence other than CF-bit flag register

15.4 interrupt routines written int9

Simulate the following steps:

Flag register stack;
IF=0，TF=0；
CS, IP stack
（IP）=（DS）*16+0；（CS）=（DS）*16+2

3 and 4 can be simplified as call dword ptr ds: [0]

note:

To return to the program before the interrupt routine entry address back to the original address in the vector table int 9, otherwise the program returns, else the program will not be able to use the keyboard.
Interruption code is taken to determine the program entry address, where interruption code has been determined, it can not be called an int instruction.

the ASSUME CS: code 
Stack segment 
    DB 128 DUP ( 0 ) 
Stack ends 
Data segment 
    DW 0 , 0 
Data ends 
code segment 
Start: 
    ; stack segment address 
    MOV AX, Stack 
    MOV SS, AX 
    MOV SP, 128 
    
    ; data segment address 
    mov ax, data 
    MOV DS, AX 
    
    ; original number 9 interrupts save the entry address in the vector table to DS: [ 0 ], DS: [ 2 ] 
    MOV AX, 0 
    MOV ES, AX 
    Push ES: [ 9 * . 4 ] 
    POP DS: [ 0 ] 
    push es: [. 9 * . 4 + 2 ] 
    POP DS: [ 2 ] 
    
    ; INT9 provided new interrupt routine entry address 
    MOV Word PTR ES: [ . 9 * . 4 ], INT9 offset 
    MOV ES: [ . 9 * . 4 + 2 ], CS 
    
    ; disposed in the display buffer region 
    MOV AX, 0b800h 
    MOV ES, AX 
    MOV DI, 160. * 12 is + 40 * 2 
    MOV AH, ' A ' 
S: 
    ; character display 
    MOV ES: [DI], AH 
    Call Delay 
    inc is AH 
    CMP AH, ' Z '
    S JNA 
    
    ; int9 interrupt routine to restore the original entry address 
    MOV AX, 0 
    MOV ES, AX 
    Push DS: [ 0 ] 
    POP ES: [ . 9 * . 4 ] 
    Push DS: [ 2 ] 
    POP ES: [ . 9 * . 4 + 2 ] 
    
    MOV AX, 4c00h 
    int 21H 

    ; delay 
delay: 
    Push DX 
    Push AX 
    ; 10 0000H write the high and low address 
    MOV DX, 10H 
    MOV AX, 0 
S1: 
    ; use only sub, not On Dec 
    Sub AX, . 1 
    SBB DX, 0
    DX CMP, 0 
    JNE S1 
    CMP AX, 0 
    JNE S1 
    
    pop AX 
    pop DX 
    RET 
    
    ; new interrupt routine 
INT9: 
    Push AX 
    Push BX 
    Push ES 
    ; read from the keyboard input port 60h 
    in Al, 60h 
    
    PUSHF 
    PUSHF 
    ; extraction flag register 
    pop BX 
    ; the IF = 0 , TF = 0 
    and BH, 11111100b 
    ; save flag register 
    Push BX 
    POPF 
    
    call DWORD PTR DS: [ 0 ]; int instruction of the simulation, the original call int9 interrupt routine, other processing hardware details 

    cmp al, 1 ; Analyzing has pressed the ESC 
    JNE int9ret
    
    AX MOV, 0b800h 
    MOV ES, AX 
    inc is byte PTR ES: [DI + . 1 ]; attribute value + 1'd 
int9ret: 
    POP ES 
    POP BX 
    POP AX 
    IRET 
    
code ends 
End Start