PHY ((Physical Layer, PHY) ) is defined in IEEE802.3 standard modules , STA (station management entity, the management entity and a MAC or CPU) by a SMI (Serial Manage Interface) against the PHY, state management and control, and specific management and control operation is performed by an internal PHY register read-write implementation.
The basic structure of the PHY follows:
PHY is a physical interface transceiver, which implements the physical layer of the OSI model. IEEE-802.3 standard defines Ethernet PHY. Comprising MII / GMII (media independent interface) sublayer , the PCS (physical coding sublayer) , the PMA (Physical Medium Attachment) sub-layer , the PMD (Physical Medium Dependent) sublayer , the MDI sublayer . It meets the specification for the IEEE-802.3k lOBaseT (Article 14) and 100BaseTX (24 and 25 bars).
Note: PHY register in the IEEE802.3 standard section 22.2.4 Management functions presentations, but does not involve all the registers, individual registers need to other sections seen, of course, there are also mentioned in the document which the register where to find.
The main reference:
1 https://www.cnblogs.com/jason-lu/p/3196096.html
2 https://www.cnblogs.com/jason-lu/articles/3195473.html
3、IEEE Standard for Ethernet (802.3-2018)