[INTEL (ALTERA)] The F-Tile dynamic reconfiguration design example in quartus' AN/LT enabled 400GE-4 FHT basic variant does not run properly in the hardware

illustrate

Due to an issue in Intel® Quartus® Prime Professional Edition software 23.4, the F-Tile dynamic reconfiguration design example in the base variant of 400GE-4 FHT with AN/LT enabled will not run properly in the hardware.

Specifically, after executing the tcl script to run the design example, the system console hangs with the following message:
Successfully read port 16 CSR register offset = 0x142c0, data = 0x2006
Successfully read Ethernet ANLT channel 16 register anlt_seqcfg_csr4, offset = 0x2c0, data = 0x2006
Successful read of port 16 CSR register offset = 0x240, data = 0x0
INFO: port_state value = 0x00000000
Successful read of port 16 CSR register offset = 0x240, data = 0x0
INFO :port_state value = 0x00000000
Successfully read port 16 CSR register offset = 0x240, data = 0x0
info :port_state value = 0x00000000
Successfully read port 16 CSR register offset = 0x240, data = 0x0
info :port_state value = 0x00000000


Solution

To resolve this issue in Intel® Quartus® Prime Professional Edition software version 23.4, follow these steps :

  1. Switch to the directory <design example project directory>/hardware_test_design/hwtest_f/eth_f_dr
  2. Open the file  ftile_eth_anlt_cfgcsr_inc.tcl in a suitable text editor
  3. Find  the following code snippet:

Proc get_reset_port_state_status_0 {ch} {

Put "\tINFO: Channel $ch: Checking port status..."

Set timeout 10

Set I 0

And {1} {

if {$ch > 0xf} {

set rdata0 [reg_read [expr 0x200 + [expr $ch * 0x4]]]

} else {

set rdata0 [reg_read [expr 0xc0 + [expr $ch * 0x4]]]

}

put $::fileid “\t\tINFO: port_state value = $rdata 0”

Set port_state_value [expr ($rdata 0 >> 29) & 0x1]

if {($port_state_value == 1 ) || $i >= $timeout } break

incr i

}

if {$port_state_value == 1} {

Put "\tINFO:port_state signal high"

} else {

放置“\tERROR: mport state not go high”

}

}

  1. change next line

from:

set rdata0 [reg_read [expr 0x200 + [expr $ch * 0x4]]]

since:

set rdata0 [reg_read [expr 0x200 + [expr [expr 0x0f & $ch] * 0x4]]]

  1. save document
  2. Use the modified script file in the system console to run the design example on the hardware

This issue is planned to be fixed in a future release of Intel® Quartus® Prime Professional Edition software.

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Origin blog.csdn.net/sqqwm/article/details/134996367