[Internet of Things] Is the interrupt mechanism of STM32 unclear? It is enough to read this article

In embedded systems, interrupts are an important mechanism for handling asynchronous events from external devices. The STM32 series microcontrollers provide a powerful interrupt controller that can easily handle various external interrupts and internal interrupts. This article will introduce in detail the structure and use of STM32 interrupts.
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1. What is interruption?

An interrupt is a mechanism in a computer system used to handle unexpected or asynchronous events. During the operation of the computer, the CPU usually executes the instructions in sequence. However, when certain special events occur, such as input from external devices, timer overflow, etc., the CPU needs to immediately interrupt the current task and instead process these tasks. event. This improves system response speed and efficiency.

Interruption can be seen as a sudden interruption, similar to when we are doing something and suddenly receive a phone call, we need to immediately stop what we are doing to answer the phone. Interrupts can be divided into two types : hardware interrupts and software interrupts .

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Hardware interrupts are triggered by external devices, such as keyboard input, mouse clicks, etc. When an external device triggers an interrupt signal, the CPU will immediately stop the current task and execute the interrupt-related processing program. After handling the interrupt, the CPU will return to where it was interrupted and continue execution.

Software interrupts are triggered by special instructions in the program. The program can actively request the CPU to interrupt the current task through software interrupt instructions and execute interrupt-related processing procedures. Software interrupts can be used to implement specific functions, such as system calls from the operating system.


2. Interrupt priority

In the STM32 microcontroller, the interrupt priority is used to determine the order in which the **interrupt service routine (ISR)** is executed. The STM32 series microcontrollers support multiple interrupt sources, and each interrupt source has a corresponding interrupt priority.

Interrupt priority can be divided into two levels: preemption priority and sub-priority .

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  1. Preemption Priority : The preemption priority determines which interrupt can interrupt the currently executing interrupt when multiple interrupts occur at the same time. An interrupt with a higher preemption priority can interrupt an executing lower priority interrupt and immediately execute its own interrupt service routine.
  1. Subpriority : Subpriority is used to determine which interrupt will be executed first among multiple interrupts of the same preemption priority level. Interrupts with higher subpriority levels will be executed before other interrupts of the same preemption priority level.

2.1 Why do we need sub-priority when there is preemption priority?

The combination of preemptive priority and subpriority can provide more flexible interrupt control and scheduling. The preemption priority is mainly used to handle the interrupt preemption relationship when multiple interrupts occur at the same time, while the sub-priority is used to handle the execution order of multiple interrupts with the same preemption priority.

Using preemptive priority can ensure that critical interrupts can promptly interrupt the executing low-priority interrupt and immediately execute its own interrupt service routine. This is very important for applications with high real-time requirements.

However, when multiple interrupts have the same preemption priority, without sub-priority support, they will be executed in sequence, and finer-grained scheduling cannot be performed. In general, the number of bits in the preemption priority level is greater than the number of bits in the sub-priority level, so the range of preemption priority levels is wider and can provide more fine-grained interrupt control. By using subpriorities, you can determine which interrupt to execute first among multiple interrupts of the same preemption priority level. This is useful for applications that need to prioritize certain interrupts.


3. Interrupt nesting

Interrupt nesting means that during the execution of an interrupt service routine (ISR), another interrupt occurs and triggers the execution of the corresponding interrupt service routine. When an interrupt is being processed, if a higher priority interrupt occurs, the system will suspend the processing of the current interrupt and switch to processing the higher priority interrupt. This is interrupt nesting.

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Interrupt nesting is very common in real-time systems, which allows the system to respond to higher priority interrupt requests in a timely manner while processing an interrupt. Through interrupt nesting, multiple interrupt requests can be prioritized and processed to ensure that key interrupts can promptly interrupt the executing lower priority interrupt and immediately execute its own interrupt service routine.

In STM32 microcontrollers, interrupt nesting is implemented through preemption priorities and sub-priorities. When an interrupt is being executed, if an interrupt request with a higher preemption priority occurs, the system will immediately interrupt the execution of the current interrupt and start processing the higher-priority interrupt. If multiple interrupts have the same preemption priority, the subpriority determines the order in which they are executed.

Interrupt nesting may introduce some problems. For example, excessive interrupt nesting depth may lead to system performance degradation. At the same time, interrupt priorities and mutual exclusion and synchronization issues of interrupt service routines need to be reasonably handled to ensure the correctness and reliability of the system. .


4. Interrupt structure

4.1 Interrupt Vector Table : The interrupt vector table is a data structure that stores interrupt vector addresses and is used to store the entry address of the interrupt service function. When an interrupt occurs, the microcontroller will read the corresponding ISR address from the interrupt vector table according to the interrupt number, and jump to this address to execute the interrupt service routine. In STM32, the interrupt vector table is stored at the starting address of the internal flash memory.

The size of the interrupt vector table depends on the number of interrupts supported by the microcontroller. For the STM32 series microcontrollers, the interrupt processing method based on the vector table is usually used, in which the size of the interrupt vector table is fixed, and the size of each interrupt vector is 4 bytes. Therefore, the size of the interrupt vector table is equal to the number of interrupts times 4 bytes.

In programming, we can specify the ISR address of each interrupt by modifying the interrupt vector in the interrupt vector table. Usually, we use the specific syntax provided by the compiler to define the interrupt vector table and interrupt service routine and place them at the correct address location.

It should be noted that the interrupt vector table is read-only and stores the address of the interrupt service routine determined by the system at compile time. Therefore, the interrupt vector table cannot be modified at runtime. If you need to dynamically change the execution address of the interrupt service routine, you can use interrupt vector redirection technology, that is, by modifying the interrupt vector in the interrupt vector table, redirect the interrupt to another address. But this technique needs to be used with care to avoid introducing unpredictable errors.

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4.2 Interrupt Controller (Nested Vectored Interrupt Controller, NVIC) : NVIC is the core component of the STM32 interrupt controller and is used to manage and control interrupts. It supports multi-level interrupt priority, can configure interrupt priority, enable or disable interrupts, and provide the address of the interrupt vector table.

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NVIC has the following main functions:

  • Interrupt priority management: NVIC allows each interrupt to be assigned a preemption priority and a sub-priority. The preemption priority is used to determine the preemption relationship of interrupts, while the sub-priority is used to determine the execution order of multiple interrupts with the same preemption priority. NVIC provides registers to configure and manage interrupt priorities.

  • Interrupt enable/disable control: NVIC provides registers to enable or disable specific interrupts. Interrupts can be selectively enabled or disabled by setting the corresponding bits. This is useful for flexibly controlling interrupt triggering and execution.

  • Interrupt status management: NVIC provides registers to manage interrupt status. For example, you can determine whether an interrupt is pending by reading and writing the interrupt pending register, and clear the interrupt flag by writing to the interrupt clear register.

  • Interrupt vector table offset: NVIC allows the starting address of the interrupt vector table to be modified by setting the offset. This is useful for implementing interrupt vector redirection, which redirects interrupts to other addresses.


4.3 Interrupt Service Routine (ISR) : The interrupt service function is a block of code that is executed when an interrupt occurs. In STM32, interrupt service functions need to use specific function declaration and naming rules, and be registered through the interrupt vector table.

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5. How to use interrupts

  1. Configure interrupt priority: First, you need to use NVIC_SetPriority()functions to set the preemption priority and sub-priority of the interrupt. The parameters of this function include the interrupt channel number and priority value.

  2. Initialize the interrupt vector table: In the startup code, the starting address of the interrupt vector table needs to be initialized. You can use NVIC_SetVectorTable()functions to set the offset address of the interrupt vector table.

  3. Register interrupt handler function: Use NVIC_Init()function to register interrupt handler function. The parameters of this function include the interrupt channel number, interrupt priority and the address of the interrupt handling function.

  4. Enable interrupts: Use NVIC_EnableIRQ()the function to enable interrupts. The parameter of this function is the interrupt channel number.

  5. Write an interrupt handling function: Write an interrupt handling function to handle the logic when an interrupt event occurs. The naming and parameters of the interrupt handler function depend on the interrupt channel and programming language used.

The following is a sample code that demonstrates how to implement an interrupt using standard peripheral library functions:

#include "stm32f10x.h"

// 中断处理函数
void EXTI0_IRQHandler(void)
{
    
    
    // 处理中断事件逻辑
    // ...

    // 清除中断标志
    EXTI_ClearITPendingBit(EXTI_Line0);
}

int main(void)
{
    
    
    // 初始化中断向量表
    NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);

    // 配置中断优先级
    NVIC_SetPriority(EXTI0_IRQn, 0);

    // 注册中断处理函数
    NVIC_InitTypeDef NVIC_InitStructure;
    NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
    NVIC_Init(&NVIC_InitStructure);

    // 使能中断
    NVIC_EnableIRQ(EXTI0_IRQn);

    while (1)
    {
    
    
        // 主循环逻辑
        // ...
    }
}

Summarize

STM32 interrupts provide powerful functions that can easily handle various external interrupts and internal interrupts. By properly configuring interrupt priorities and interrupt service functions, timely response to asynchronous events can be achieved. In practical applications, it is necessary to rationally use the interrupt function according to specific needs and hardware equipment to improve the reliability and performance of the system.

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Origin blog.csdn.net/Goforyouqp/article/details/133578568