Detailed Explanation of Chip Manufacturing. Birth of Wafer. Study Notes (2)

1. Manufacture of silicon wafers

China's monocrystalline silicon wafer production capacity in 2020:

the difference between photovoltaic grade monocrystalline silicon and semiconductor grade monocrystalline silicon used to make chips: purity
photovoltaic grade purity: 99.9999%
chip semiconductor level: 99.99999999%

Although my country has a high production capacity of monocrystalline silicon wafers, most of them are photovoltaic grade. Only 5% are chip semiconductor level.

Global Market Size:

Second, the difference between silicon wafers, wafers and chips

Simply put, it is a grandparent relationship.

name	silicon wafer	wafer	chip
seniority in the family	grandfather	dad	grandson
relation	Bare wafer (lithography, epitaxy, etch)	Wafers containing hundreds of chips (dicing, packaging)	independent chip
English	raw wafer	wafer	chip

3. From Ingot to Wafer

(1).Truncation

Frosted silicon rods that pass the Czochralski method will have their heads and tails cut off.

In order to save, the cut head and tail can be processed and continue to pull out new silicon rods.

(2). Four-probe method

Measure the resistivity of the rod body and check the impurity concentration in the axial direction.

(3). Cut into silicon segments

(4).Rolling

Fix the silicon segment on the machine, let it roll after running the machine, and grind the rod body with a diamond grinding wheel (golden wheel).
Note: Because the friction between the gold wheel and the silicon rod will generate a lot of heat, it is necessary to continue to add water to cool down

(5). Grinding positioning edge (groove)

Positioning edge function: indicates the type and crystal orientation of the silicon wafer.

crystal orientation

(6).Silicon segment slicing

In order to improve efficiency and reduce loss. Multi-wire cutting machine using diamond wire. There are many diamond particles attached to the steel wire.

(7). Grinding disc

Control the thickness to about 775 microns by grinding.

Note here that some silicon wafers will also have back damage (Backside Roughening). That is to artificially create a rough back, such as sandblasting on the back, or depositing a layer of polysilicon. This is to deliberately create a large number of crystal defects at the bottom, as a trap, trap impurities in the subsequent process in the bottom layer, thereby protecting the upper layer. device.

(8).Chamfering

Because high-purity silicon is a highly brittle material, chamfering reduces the risk of chipping at the edges.

The curved corners have other functions:
1. The photoresist is applied on the surface of the silicon wafer by rotation. If the edge is a right-angled side, the photoresist is easily accumulated on the edge by centrifugal force, resulting in uneven thickness. situation, thereby affecting lithography.
2. When doing epitaxial growth, the deposits will also preferentially accumulate on the right-angled sides, which will affect the deposition effect.

The arc-shaped corner can eliminate the phenomenon of edge deposition (Edge Crown)

(9). Mark the laser identification code

(10). Etching

(11).Chemical Mechanical Polishing (CMP)

Chemical-Mechanical Polishing, this step combines physical and chemical polishing methods.
The specific method is to load the silicon wafer on the rotating polishing instrument and lower it below. The thin surface layer is first slurried, chemically oxidized and then physically abraded by the polishing pad. In this step, the thickness of the silicon wafer will be thinned by about 5 microns. until polished to a perfect mirror finish.

Typically, 8-inch silicon wafers are polished on one side. 12-inch silicon wafers are polished on both sides. In this way, a polished sheet is obtained.

(12).Wet cleaning

Finally, it needs to be cleaned with deionized water and various chemical solvents to remove all kinds of dust and impurities adhering to the surface of the silicon wafer during the process.

These particles can affect the chip manufacturing process and cause short circuits or open circuits in devices. In addition to strictly controlling the density of pollutants, their particle size often cannot exceed half of the characteristic size. Therefore, the diameter of a single particle that can be allowed in advanced processes is only a few nanometers at most . This is much stricter than aseptic surgery.

The diameter of a flu virus is 100nm, and the bacteria are even bigger. Therefore, many workers in fabs or new studios must take a vacation when they catch a cold, otherwise a sneeze may contaminate the chip. This is why the epidemic has hit chip production capacity hard.

Cleaning, etching, and CMP of silicon wafers will accompany many stages of chip production. This process is repeated continuously.
In addition to the flatness and cleanliness, the silicon wafer must also ensure the warpage, oxygen content (Interstitial Oxygen) and metal residues. The silicon wafer was finally born.

(13). Inspection and packaging

The silicon wafer will be placed in a sealed box filled with nitrogen gas and sent to the fab. Start your next journey.

4. Types and sizes of silicon wafers (expansion)

4.1 Types of silicon wafers

In addition to ordinary silicon wafers, there are many special types of silicon wafers to meet the different process technologies or product requirements of fabs. Such as epitaxial wafers, annealed wafers, SOI wafers and so on. These variant silicon wafers will be explained later.

4.1 Dimensions of silicon wafer

In addition to the types of silicon wafers, there are also many sizes of silicon wafers. In addition to the 12-inch and 8-inch mentioned earlier. Both are customary names in the industry, referring to silicon wafers or wafers with a diameter of 200 and 300 mm.

8 inches - 20.32 centimeters (cm)
12 inches - 30.48 centimeters (cm)

In theory, the larger the diameter, the better, so that more chips can be produced from a single wafer. And there are fewer broken chips (edge ​​die) at the edge of the silicon wafer. The production yield rate is further improved, and the manufacturing cost is shared, but the threshold for large-size silicon wafers in terms of process and equipment is also higher.
At present, 8-inch is widely used in mature processes above 90nm. Most of the sensors and power devices in our private cars are produced from 8-inch silicon wafers. Larger 12-inch wafers are used for more advanced processes. Computer CPU graphics cards and mobile phone storage are basically produced on 12-inch silicon chips.

Now the global supply of silicon wafers is mainly monopolized by five companies. Japan is the first country to achieve 12-inch mass production. Since then, it has maintained its first-mover advantage in silicon wafer technology.
Universal Wafer is a company established in 2011, relying on the technology accumulation inherited from China and the United States and the strong mergers and acquisitions and expansion in recent years, it has rapidly grown into the third place in the silicon wafer market.

At present, among the semiconductor silicon wafer manufacturers in mainland China, Zhonghuan, Leon Micro, and Shanghai Silicon Industry are the main ones. Among them, Tianjin Zhonghuan Co., Ltd. is based on photovoltaic monocrystalline silicon. Since the beginning of this year, it has actively deployed the R&D and production of semiconductor-grade silicon wafers. Hangzhou Leon Micro is focused on semiconductors, and can make silicon materials and silicon wafers as well as chips for discrete devices. It is one of the few semiconductor companies in China that can penetrate the upstream and downstream of the industry. Shanghai Silicon Industry Group and its subsidiary Shanghai Xinsheng are currently the leaders in silicon wafer technology in China. In addition to owning the independent technology of SOI silicon wafers, when other domestic manufacturers can only produce silicon wafers of 8 inches and below, they took the lead in starting large-scale production of 12-inch silicon wafers in 2018. It ended the history that domestic large-size silicon wafers were all imported.
However, due to the huge cost investment and low yield rate, the large-size silicon wafers of the Shanghai silicon industry will still fail to make profits in 2021.

5. Difficulties in the road to domestic production

1. Cost

The first difficulty in the localization of silicon wafers: cost .

2. Equipment

The second difficulty: equipment . Taking single crystal furnaces as an example, all major chip oligarchs have their own exclusive suppliers, and Shin-Etsu Chemical can even manufacture single crystal furnaces by itself, so that the outside world cannot buy the same model.
In the subsequent production process, domestic chip manufacturers basically use imported equipment. For example, the chamfering machine mainly comes from Tokyo Precision and Datu Electronics in Japan.

Multi-wire cutting machines mainly come from Japan’s NTC and Switzerland’s slicingTech. Although these equipment can be replaced by domestic manufacturers, the quality and accuracy are often far behind. But the polishing equipment itself is completely dependent on imports

3. Path dependency

Difficulty 3 lies in the path dependence of fabs on silicon oligopoly. From bare silicon wafers to wafers containing hundreds of chips. In the process, dozens of equipment and thousands of processes are required, and the cost is huge.
Therefore, from the source process verification stage, the fab must work closely with the silicon wafer supplier. After a process is mature, the fab will not rashly replace silicon wafers from other suppliers.
Otherwise, once the production yield and chip reliability are affected, the cost will be too great.

4. R&D investment and personnel training