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How to Make a Chip: Thin Film Deposition|Detailed Chip Manufacturing 06
Detailed Explanation of Chip Manufacturing. Thin Film Deposition. Study Notes 6
1. Deposition induced by thin film
What is a thin film?
Answer: There are two kinds of films that are most common in life, one is used to keep fresh and the other is used for insurance.
But the thinnest plastic wrap has a thickness of 0.01mm, and the thickness of the film in the eyes of chip engineers is no more than 1/10 of the plastic wrap, and the materials range from semiconductors, compounds to metals, and these films have a thickness of sub-micron to nanometer , Even if you have the ancestral film sticking skills, you can't stick it.
It can only be "sprayed" on the surface of the wafer by physical methods, or "grown" on the surface of the wafer by chemical methods.
This process is deposition (deposition Deposition).
2. Classification of deposits
2.1 Physical deposition (PVD)
It is mainly used to coat various metal films on chips by evaporation or sputtering.
2.2 Chemical Vapor Deposition (CVD)
The full name is Chemical Vapor Deposition.
The early CVD engineering was very active, and the process and principle were similar to the steps of high temperature oxidation and high temperature diffusion.
When doing CVD, first put the silicon wafer into the burning furnace tube, and then continuously pass in specific chemical gases, such as flammable silane and irritating ammonia.
These gas molecules are in contact with the silicon wafer through convection and diffusion at high temperature. And adsorbed on its surface, a chemical reaction occurs. Generate solid target products such as polysilicon or silicon nitride.
The growth mode of each solid-state deposit is different, but it usually forms nuclei on the surface of the silicon wafer. After experiencing island-like growth, they finally connect into one piece and become a thin film.
The thickness of the film layer increases with the deposition time. CVD is an indispensable and important process in the semiconductor manufacturing process. The birth of a chip requires dozens to hundreds of CVDs. Because the films deposited each time have different uses, such as silicon nitride , the material has high hardness and stable properties. It can be used not only to fill the grooves and gaps on the wafer, but also to passivate the upper layer of the chip. membrane. It plays the role of moisture-proof and impurity-proof.
Protect the underlying delicate device circuits.
Another example is the deposition of metals such as tungsten , which are used to fill the through holes in the chip and vertically connect the upper and lower metal layers.
On the contrary, insulating materials such as silicon dioxide are sometimes deposited to isolate different dielectric layers, but chemical vapor deposition is not a technology that was born for making chips. The means of crystal growth, CVD is widely used in the production of optical equipment and synthetic gemstones. Especially for the manufacture of artificial diamonds, it can greatly reduce the cost of marriage for men.
3. History of sedimentation
In the history of semiconductors, Xiantong was the first to use high-temperature CVD to engage in technological alchemy. This is a dead semiconductor company. But it once gave birth to half of Silicon Valley. Later Intel, AMD, and Moore's Law were all eggs laid by Fairchild.
In 1967, Fairchild, who was in his prime, used CVD technology to deposit a polysilicon film on a transistor on a single crystal silicon substrate as a gate.
Here I can't help asking, why use polysilicon with poor conductivity?
Answer: Temperature and doping have to be mentioned here . Silicon is not as conductive as metal, but the resistance of silicon can be adjusted by doping. The so-called doping is to add specific impurities into pure silicon to change the electrical characteristics of the semiconductor. There are many ways of doping, one of which is to add additional chemical gases containing boron or phosphorus during CVD. A doped polysilicon film is deposited.
This method of using CVD in one step is very useful before ion implantation is applied on a large scale. For example, in the early DRAM process, a p-type doped epitaxy (Epitaxy) layer was used to reduce the latch-up effect (Latch-up ).
3.1 V1.0 Atmospheric Pressure Chemical Vapor Deposition APCVD
The polysilicon deposited by Fairchild, in addition to the easy adjustment of resistance, another advantage of silicon is that it is more resistant to high temperature than most metals, because the early CVD was carried out at normal pressure and high temperature. Also called APCVD (Atmospheric Pressure Chemical Vapor Deposition). The temperature in the furnace tube exceeds 1000 degrees Celsius, but the film deposition needs to be repeated, and the film deposited last time may melt away during the next deposition.
Therefore, the limitation brought by high temperature is extremely high, and the melting point between film materials needs to be considered repeatedly. In addition, at high temperature, the chemical reaction of vapor phase film formation is very strong, and the deposition rate is really fast, but it is also easy to cause uneven and non-dense film formation. . On silicon wafers, the quality of film growth varies, and steps cannot be evenly covered and holes cannot be completely filled.
3.2 V2.0 Low Pressure Chemical Vapor Deposition LPCVD
Therefore, the engineers began to make some updates to the V1.0 version of CVD, slightly lowering the temperature and greatly reducing the air pressure. This is the low pressure vapor deposition (LPCVD) of the V2.0 version.
The drop in temperature and pressure makes the film formation effect more uniform and stable. Although the deposition efficiency is sacrificed, because the gas is easier to diffuse to the surface of the silicon wafer under low pressure, the utilization rate of the chemical gas is higher, so the furnace tube originally Silicon wafers that lay flat can now stand upright. With multiple placements, the overall deposition yield is increased.
However, despite many improvements, the temperature of LPCVD is still too dangerous for most metals, such as early chips, which often use aluminum as the metal connection. But the melting point of aluminum is only 660°C. If you want to deposit a layer of silicon nitride as a passivation film on the chip with the circuit connected, whether it is 1000°C of APCVD or 800°C of LPCVD, it exceeds the melting point of aluminum.
So the V2.0 version of PVD ushered in another wave of enhancements.
3.3 V3.0 Plasma Enhanced Chemical Vapor Deposition PECVD
Plasma Enhanced Chemical Vapor Deposition (PECVD).
In this update, the engineers brought in the RF power supply for dry etching, placed the silicon wafer between parallel electrodes, and excited the plasma (plsama) to energize CVD.
Because the original surface chemical reaction was mainly driven by thermal energy, now with the blessing of extra energy, the film formation rate is faster, and the temperature threshold is greatly reduced. If you want to deposit silicon nitride, 400°C is enough. There is no need to worry about the melting of the metal part of the chip. In addition, in PECVD, additional argon (Ar) is often added to allow the film being formed to be bombarded by plasma particles. In other words, chemical deposition and physical etching will occur simultaneously. By adjusting the ratio of the two, it can deposit a denser film and adjust the stress in the film.
4. Membrane stress
When it comes to membrane stress, it is the focus of this lesson.
Thin film deposition is not as simple as stacking chips, it has a magical power. Can change the physical properties of the material itself.
Vapor Phase Epitaxy is a special classification in CVD, which refers to the precise control of various parameters in the deposition process, so that the crystal orientation of the grown thin film is consistent with the substrate material.
At the microscopic level, the types of atoms that make up each material are different and arranged in different ways. For example, the atomic lattices of single crystal silicon (Si) and germanium (Ge) are both symmetrical cubic structures.
However, the clusters between silicon atoms should be slightly tighter. The distance between atoms at room temperature is 5.43 angstroms, while the distance between germanium atoms is slightly larger at 5.66 angstroms. The facing surface of the material is equivalent to forcibly stuffing germanium atoms into a slightly smaller silicon lattice. This kind of germanium that has been worn with small shoes becomes the strained germanium (strained Ge) that endures stress.
If the deposition continues, the underlying silicon germanium will not be able to stretch, and dislocations and defects will easily occur to release the stress. As the film thickness increases, it will gradually return to a normal lattice.
Epitaxial silicon on germanium is also a similar process, but the direction of the internal stress of the film is opposite. Therefore, when doing heterogeneous epitaxy of different materials, in principle, the lattice size between materials should be considered to minimize the influence of film internal stress. Otherwise, it will easily lead to microscopic dislocation defects and macroscopic film cracking.
But engineers soon found out. The stress of the film can also be used. If the thickness is controlled during deposition, so that a very thin layer of silicon grows, this silicon cannot beat germanium, which has a large number of people, so it has to be added. The lattice spacing is always consistent with germanium. And this layer retains silicon with extra stress, called strained silicon (strained Si).
And the mobility of carriers inside this layer of silicon that retains extra stress will be greatly improved. If this strained silicon is used as the channel region of the transistor, the drive current of the device will be greater. The higher the switching frequency, the faster the chip and the lower the power consumption. This is the strained lattice thin film channel carrier enhancement method , referred to as the film method .
In addition to the heteroepitaxy method of silicon germanium compound, the transistor film method also includes silicon germanium embedded in the source and drain regions (embedded SiGe) and silicon nitride partial coating. The principle is to enhance the electrical characteristics of transistor materials through the ingenious use of membrane force.
Major manufacturers such as AMD and Intel, starting from the 90nm process, have added film method to CMOS devices in batches, and later combined with the deposition of high-k gate dielectric materials to effectively control the leakage current of transistors. Moore's Law has been successfully extended to 45nm. During this period, the performance of each generation of CPU has been improved, and the film method has contributed a lot. Of course, if the chip size goes down, the leakage current can no longer be controlled. It is necessary to upgrade both the CVD film method and the lithography knife method, learn the new atomic layer deposition and immersion lithography, and connect them into self-aligned double exposure technology (SADP), and cut the transistor gate into fish fins. The finFET debuted, and the process has entered 28nm.
5. Other CVD technologies
There are many tortuous stories behind every difficult advancement of Moore's Law.
CVD has undergone many version updates until today, and has successively extended new technologies such as high-density plasma CVD (HDPCVD) and metal-organic CVD (MOCVD). Like the aforementioned atomic layer deposition, it is referred to as ALD (ATOMIC LAYER DEPOSITION), which is A process that develops the control level of CVD to the extreme. Each chemical gas is fed alternately with a very short pulse cycle, so that the reaction gas is taken away by the inert gas and emptied by the inert gas only before depositing a layer of atoms in one cycle. In this way, the original continuous deposition process is forcibly interrupted. It can control the thickness of the film layer extremely accurately, and produce an ultra-thin film with strong density and covering ability. This is the key to the production of three-dimensional devices such as FinFet or GAA. Therefore, in the manufacture of high-end chips, deposition equipment is as important as lithography machines and etching machines.
6. International CVD equipment
At present, the production of thin film deposition equipment is mainly in the hands of European, American and Japanese manufacturers. Half of the CVD equipment is occupied by American Lam and Applied Materials (AMAT).
Nearly 60% of the cutting-edge ALD market is divided up by Tokyo Electron (TEL) and ASMI in the Netherlands.
Note here that the Dutch lithography is called: ASML
deposition equipment is called: ASMI ASMI
These two companies are father and son
7. Domestic CVD equipment
Domestic CVD manufacturers are dominated by North Huachuang, China Micro, and Tuojing Technology. Among them, Tuojing Technology specializes in CVD equipment, especially in the field of PECVD.
Both Huachuang and China Microelectronics started with etching machines, and then gradually expanded their CVD business.
Foreign countries often have this kind of thinking, because etching and deposition have many similarities in reaction chamber structure, radio frequency power supply, and low-pressure vacuum. Only by learning plasma etching can we do plasma CVD well, and only when we learn atomic layer etching can we do a good job. Well done ALD.
The technological progress of etching and deposition will also promote the technological development of other fields. For example, one of the unlocking conditions of EUV lithography machine is to use ultra-thin film mirrors with molybdenum and silicon multilayer structures. To enhance the reflectivity of extreme ultraviolet light.
In short, the further science advances, the more complex the degree of intersection between basic disciplines will be. How far human science and technology can go in the future depends not on how long the technology's long board is, but often depends on how short the short board is.