FPGA - pwm breathing light

1. Experimental environment

Quartus 18.1
modelsim
vscode
Cyclone IV development board

2. Experimental tasks

Breathing light refers to the gradual change of light from bright to dark under the control of the microcomputer, which feels like a person is breathing. This experiment is to use the four LED lights on the development board to realize the breathing light at intervals of 1s. The process of making 4 led lights from dark to bright, and then from bright to dark.

3. Experimental process

3.1 verilog code

module pwm_led (
    input                   clk     ,
    input                   rst_n   ,

    output  reg     [3:0]   led     
);

parameter TIME_US = 6'd50;//50x20=1000ns=1us
parameter TIME_MS = 10'd999;//1usx1000=1ms
parameter TIME_S = 10'd999;//1msx1000=1s

reg     [5:0]   cnt_us;
reg     [9:0]   cnt_ms;
reg     [9:0]   cnt_s;
reg             flag;

wire  add_cnt_us;//开始计数的标志
wire  end_cnt_us;//结束计数的标志
wire  add_cnt_ms;
wire  end_cnt_ms;
wire  add_cnt_s;
wire  end_cnt_s;

always @(posedge clk or negedge rst_n) begin
    if(!rst_n)begin
        cnt_us <= 6'd0;
    end
    else if(add_cnt_us)begin
        if(end_cnt_us)begin
            cnt_us <= 6'd0;
        end
        else begin
            cnt_us <= cnt_us + 1'd1;
        end
    end
    else begin
        cnt_us <= cnt_us;
    end
end

assign add_cnt_us = 1'b1;
assign end_cnt_us = add_cnt_us && cnt_us == TIME_US;

always @(posedge clk or negedge rst_n) begin
    if(!rst_n)begin
        cnt_ms <= 10'd0;
    end
    else if(add_cnt_ms)begin
        if(end_cnt_ms)begin
            cnt_ms <= 10'd0;
        end
        else begin
            cnt_ms <= cnt_ms + 1'd1;
        end
    end
    else begin
        cnt_ms <= cnt_ms;
    end
end

assign add_cnt_ms = end_cnt_us;
assign end_cnt_ms = add_cnt_ms && cnt_ms == TIME_MS;

always @(posedge clk or negedge rst_n) begin
    if(!rst_n)begin
        cnt_s <= 10'd0;
    end
    else if(add_cnt_s)begin
        if(end_cnt_s)begin
            cnt_s <= 10'd0;
        end
        else begin
            cnt_s <= cnt_s + 1'd1;
        end
    end
    else begin
        cnt_s <= cnt_s;
    end
end

assign add_cnt_s = end_cnt_ms;
assign end_cnt_s = add_cnt_s && cnt_s == TIME_S;

always @(posedge clk or negedge rst_n) begin
    if(!rst_n)begin
        flag <= 1'b0;
    end
    else if(end_cnt_s)begin
        flag <= ~flag;
    end
    else begin
        flag <= flag;
    end
end

always @(posedge clk or negedge rst_n) begin
    if(!rst_n)begin
        led <= 4'b0000;
    end
    else if(!flag)begin//flag=0,led由灭到亮
        led <= {
    
    cnt_s > cnt_ms,cnt_s > cnt_ms,cnt_s > cnt_ms,cnt_s > cnt_ms};
    end
    else if(flag)begin//flag=1,led由亮到灭
        led <= {
    
    cnt_s < cnt_ms,cnt_s < cnt_ms,cnt_s < cnt_ms,cnt_s < cnt_ms};
    end
    else begin
        led <= led;
    end
end

endmodule

3.2 Pin configuration

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4. Simulation

4.1 Simulation code

`timescale 1ns/1ns
module pwm_led_tb();
    reg     clk;
    reg     rst_n;

    wire    [3:0]   led;

    parameter CYCLE = 20;
    parameter TIME_US = 5;
    parameter TIME_MS = 10;
    parameter TIME_S  = 10;

    always #(CYCLE/2) clk = ~clk;

    initial begin
        clk = 1'b0;
        rst_n = 1'b0;
        #(CYCLE);
        rst_n = 1'b1;
        #(2*(TIME_US+1)*(TIME_MS+1)*(TIME_S+1)*CYCLE);
        $stop;
    end

pwm_led #(
.TIME_US (TIME_US),
.TIME_MS (TIME_MS),
.TIME_S  (TIME_S)
) u_pwm_led(
.clk (clk),
.rst_n (rst_n),

.led (led)
);

endmodule

4.2 Simulation results

insert image description here

5. Experimental results

6. Summary

This experiment mainly needs to understand the principle of the breathing light. Here we use three counting registers, from us to ms and then to s. Finally, we determine the time when the LED is on by judging the time when the s counter is greater than the ms counter. In this way, It can realize the effect of LED from dark to bright.

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Origin blog.csdn.net/asdhnkhn/article/details/131718535