Zero-Order Hold: to achieve zero-order hold during sampling
- The location in the simulation library is:
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Simulink / Discrete
HDL Coder / Discrete
The model is:
Double-click the model to open the parameter setting interface, as shown in the figure:
illustrate
The Zero-Order Hold block holds its input unchanged for the specified sample period. If the input is a vector, the block keeps all elements in the vector with the same sampling period.
The time interval between samples can be specified by the Sample time parameter. Set to -1 indicate that the module will inherit from Sample