overview
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When building a signal chain solution for a precision data acquisition system, one of the greatest challenges in optimizing the signal is the challenge presented by managing the balance of noise between the signal chains. The gain size of the gain stage, whether the gain stage can directly drive the analog-to-digital conversion unit, the relationship between SNR and gain, and the role of digital filtering in the signal chain are all issues that design engineers often consider when building a data acquisition signal chain. These issues will be addressed in terms of noise tradeoffs.
overall architecture process
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For example:
In the language model, the encoder and decoder are formed by splicing Transformer components one by one.
Explanation of technical terms
ADC:
Analog-to-digital converter, or A/D converter, or ADC for short, usually refers to an electronic component that converts an analog signal into a digital signal. A common analog-to-digital converter converts an input voltage signal into an output digital signal. Since the digital signal itself has no practical significance, it only represents a relative size. Therefore, any analog-to-digital converter needs a reference analog quantity as a conversion standard, and the more common reference standard is the largest convertible signal size. The output digital quantity represents the magnitude of the input signal relative to the reference signal
GSPS:
The conversion time of the integral type AD is in the millisecond level and belongs to the low-speed AD, the successive comparison type AD is in the microsecond level and belongs to the medium-speed AD, and the full parallel/serial parallel type AD can reach the nanosecond level. Sampling time is another concept, referring to the interval between two conversions. In order to ensure the correct completion of the conversion, the sampling rate (Sample Rate) must be less than or equal to the conversion rate. Therefore, it is acceptable for some people to numerically equate the conversion rate with the sampling rate. Commonly used units are ksps and Msps, which means thousands/million samples per second (kilo / Million Samples per Second)
technical details
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Brief Description of Signal Chain Components
A typical signal chain in a data acquisition system is usually composed of a sensor stage, a gain stage, a buffer stage, and a quantizer stage, and the bandwidth, noise spectral density, and noise of each module affect and restrain each other. An overview of the signal chain building blocks in a data acquisition system is given.
Sensor level:
The noise bandwidth of this stage is usually low, and the noise spectral density is also low at the same time;
Gain stage:
Limited by the signal frequency, the noise bandwidth of this stage is quite low, and the noise spectral density is about 1.5nV/rtHz, which is a relatively low value. The sensor-level signal is multiplied by the gain of this level and enters the filter. The use of the filter here is necessary, mainly to limit the noise bandwidth;
• Buffer level:
This stage has a gain of 1. The noise bandwidth of the buffer stage is high, this bandwidth is limited by the ADC conversion rate rather than the signal frequency, and the noise spectral density is between 1.5nV~5nV/rtHz, depending on whether an open FDA or a single-ended to differential conversion FDA is used. The noise spectral density at the output is usually folded to the input of the next-level module;
• Quantizer stage:
The final stage is the quantizer stage, whose noise bandwidth is limited by the Nyquist frequency. Unlike the 1st or 2nd order filters of the previous stages, the noise spectral density of the brick wall filters included in this stage is relatively high, typically higher than 10nV/rtHz
summary
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The noise spectral density amplitude and bandwidth of the modules at all levels in the signal chain are shown. The blue part is the gain stage, the orange part is the ADC, and the green part is the buffer stage. The noise spectral density of all analog front ends is referred to the ADC input, and for example purposes, the noise spectral density of the gain stage is limited to four times the signal frequency to achieve greater flatness in the passband. Compared to the ADC noise spectral density, the buffer stage noise spectral density is lower but the bandwidth is significantly wider, typically reaching 10 or 15 times the ADC noise frequency. The following sections will also explain why the buffer bandwidth is set wider.