overview
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When building a signal chain solution for a precision data acquisition system, one of the greatest challenges in optimizing the signal is the challenge presented by managing the balance of noise between the signal chains. The gain size of the gain stage, whether the gain stage can directly drive the analog-to-digital conversion unit, the relationship between SNR and gain, and the role of digital filtering in the signal chain are all issues that design engineers often consider when building a data acquisition signal chain. These issues will be addressed in terms of noise tradeoffs.
overall architecture process
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The Role of Buffer Bandwidth in the Signal Chain
The signal output by the buffer first enters the filter, and after filtering, the signal is sampled by the ADC. In Figure 3, RLPF and CLPF form a low-pass filter. When the ADC is sampling, there will be the following working parameters on the buffer:
Explanation of technical terms
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ADC:
Analog-to-digital converter, or A/D converter, or ADC for short, usually refers to an electronic component that converts an analog signal into a digital signal. A common analog-to-digital converter converts an input voltage signal into an output digital signal. Since the digital signal itself has no practical significance, it only represents a relative size. Therefore, any analog-to-digital converter needs a reference analog quantity as a conversion standard, and the more common reference standard is the largest convertible signal size. The output digital quantity represents the magnitude of the input signal relative to the reference signal
Signal sampling:
Sampling refers to the process of extracting individuals or samples from the population, that is, the process of conducting experiments or observations on the population. There are two types of random sampling and non-random sampling. The former refers to the sampling method that draws samples from the population according to the principle of randomization, without any subjectivity, including simple random sampling, systematic sampling, cluster sampling and stratified sampling. The latter is a method of drawing samples based on the researcher's point of view, experience or relevant knowledge, which is obviously subjective. See "random sampling", "non-random sampling"
technical details
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1. Glitch amplitude:
The voltage across the low-pass filter is proportional to the parallel combination of the ADC capacitor and the low-pass filter capacitor. If the ADC sampling occurs before the switch is closed, the kickback voltage will be reduced more, so many ADCs have a digital or analog pre-charge function.
2. Sampling error:
Any kickback error will build up in exponential time and decay exponentially once the sampling period is over. The sampling period is a function of the acquisition time to the bandwidth. Generally, the bandwidth depends on the low-pass filter with a lower buffer period, so that the frequency of the buffer can also be obtained.
3. Filter bandwidth:
For 20-bit ADC, the recoil determination factor is 2 3 or 3 3, where N=20, Merr=3, sampling time T_ACQ=25ns, therefore, the filter bandwidth exceeds 75M. As the estimation factor and acquisition time increase, the bandwidth will also decrease. Therefore, when choosing an ADC, it is not only the SNR that matters, but also how much kickback it produces and how long it has an acquisition time. Some ADCs are very quiet but difficult to drive, which can result in a lot of noise in the driver.
summary
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For example:
The noise spectral density amplitude and bandwidth of the modules at all levels in the signal chain are shown. The blue part is the gain stage, the orange part is the ADC, and the green part is the buffer stage. The noise spectral density of all analog front ends is referred to the ADC input, and for example purposes, the noise spectral density of the gain stage is limited to four times the signal frequency to achieve greater flatness in the passband. Compared to the ADC noise spectral density, the buffer stage noise spectral density is lower but the bandwidth is significantly wider, typically reaching 10 or 15 times the ADC noise frequency. The following sections will also explain why the buffer bandwidth is set wider.
This section mainly shares the role of the buffer bandwidth in the signal chain, and mainly analyzes it from three aspects: 1. Glitch amplitude:
2. Sampling Error: 3. Filter Bandwidth: