Introduction to MIPI (CSI DSI Interface)

Introduction to MIPI (CSI DSI Interface)

Introduction to MIPI (CSI DSI Interface)

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MIPI ( Mobile Industry Processor Interface ) is an alliance established by ARM, Nokia, ST , TI and other companies in 2003 . Design complexity and increased design flexibility. There are different WorkGroups under the MIPI Alliance, which define a series of mobile phone internal interface standards, such as camera interface CSI , display interface DSI , radio frequency interface DigRF , microphone/speaker interface SLIMbus , etc. The advantage of a unified interface standard is that mobile phone manufacturers can flexibly choose different chips and modules from the market according to their needs, making it faster and more convenient to change designs and functions. The figure below shows the internal architecture of the next generation of smartphones planned according to MIPI.

MIPI is a relatively new standard, and its specifications are constantly being revised and improved. At present, the relatively mature interface applications include DSI (display interface ) and CSI (camera interface ). CSI/DSI means that they bear the weight of Camera or Display applications respectively, and both have complex protocol structures. Taking DSI as an example, its protocol layer structure is as follows:

The physical layer (Phy Layer) of CSI/DSI is formulated by a special WorkGroup, and its current standard is D-PHY . D-PHY uses 1 pair of source-synchronous differential clocks and 1 to 4 pairs of differential data lines for data transmission. Data transmission adopts DDR mode, that is, there are data transmissions on the upper and lower edges of the clock.

The physical layer of D-PHY supports two working modes: HS (High Speed) and LP (Low Power) . In HS mode, low-voltage differential signal is used, which consumes a lot of power, but it can transmit a high data rate (data rate is 80M ~ 1Gbps); in LP mode, single-ended signal is used, and the data rate is very low (<10Mbps), but the corresponding Power consumption is also very low. The combination of the two modes ensures that the MIPI bus can transmit at a high speed when a large amount of data (such as images) needs to be transmitted, and can reduce power consumption when a large amount of data is not required to be transmitted.

CSI interface

CSI-2 is a unidirectional or bidirectional differential serial interface containing clock and data signals. Hierarchical structure of CSI-2: CSI-2 consists of application layer, protocol layer, and physical layer.

The protocol layer consists of three layers:

pixel/byte packing/unpacking layer,

.LLP(Low Level Protocol) 层,

.LANE management;

The physical layer specifies the transmission medium, electrical characteristics, IO circuits, and synchronization mechanisms. The physical layer complies with the MIPI Alliance Standard for D-PHY, and D-PHY is a common standard for various MIPI working groups; all CSI-2 receivers and transmitters must Support continuous clock, you can choose to support discontinuous clock; in continuous clock mode, the clock line between data packets maintains HS mode, and in discontinuous clock mode, the clock line between data packets maintains LP11 state.

The organization has assembled veteran software and hardware manufacturers in the industry, including the largest mobile phone chip manufacturer TI, the leading audio-visual multimedia chip manufacturer ST, the global mobile phone giant Nokia, the processor core leader ARM, and the originator of the mobile operating system Symbian. With the addition of heavyweight manufacturers such as Freescale, Intel, Samsung and Ericsson, MIPI has gradually been recognized by the International Organization for Standardization.

DSI interface

The International Mobile Industry Processor (MIPI) Alliance has officially released the Display Serial Interface Specification (DSI) for mobile phones. DSI is based on the D-PHY physical layer specification of MIPI's high-speed, low-power scalable serial interconnect. The SLVS-based physical layer supports data rates up to 1Gbps while generating minimal noise.

Based on core D-PHY technology, DSI adds features to meet the needs of mobile device display subsystems, including low power mode, bi-directional communication, native language support for 16, 18 and 24-bit pixels, and a single interface to drive 4 displays capabilities, and support for buffered and unbuffered panels.

"This standard brings significant benefits to a wide range of mobile systems, from simple low-end devices, to high-complexity smartphones, to larger handheld platforms," ​​said Dick Lawrence, chairman of the MIPI Display Working Group, in a statement. The industry has been looking forward to unification on an open standard, and SDI provides the mandatory technology to drive this transition.

The serial interface generally adopts a differential structure, and uses a differential signal of several hundred mV to transmit data between the receiving and receiving ends. Compared with parallel, the serial ratio saves the wiring area of ​​the PCB board and enhances the space utilization; the differential signal enhances its own EMI anti-interference ability and reduces the interference to other signals; the low voltage swing can achieve higher faster speed, lower power consumption.

MIPI is still a developing specification, and its future improvement directions include using M-PHY with a higher-speed embedded clock as the physical layer, developing CSI/DSI to a higher version, improving the DigRF V4 interface between the baseband and RF chips, and defining High-speed storage interface UFS (mainly JEDEC organization), etc. Of course, the ultimate success of MIPI also depends on the choice of the market.

At present, the terminal market requires new designs with lower power consumption, higher data transfer rate and smaller PCB footprint. Under this huge pressure, some intelligent and cost-effective alternatives have begun to gradually Used by relevant designers. Among the several standards-based serial differential interfaces in use today , the MIPI interface is growing extremely rapidly in the field of power-sensitive and high-performance mobile handheld devices. The main driver of this growth is the widespread adoption of the MIPI Display Serial Interface (DSI) and Camera Serial Interface (CSI-2) protocols in baseband and display/camera modules . DSI and CSI-2 are logical-level protocols for displays and cameras respectively, and they manage, error and communicate data between the host and peripherals through physical interconnection. MIPI D-PHY specifies the physical and electrical characteristics of the physical layer connecting processors and peripherals. These MIPI interfaces are specifically designed to serve the mobile device market.

 

 High-speed circuit test items:

1. SI signal integrity test

2. PI power integrity test

3. Interface consistency test

 

 

 

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Origin blog.csdn.net/chenhuanqiangnihao/article/details/130402982