Camera solution in automatic driving (2) MIPI-CSI2 detailed explanation

Foreword:

In order to have a deep understanding of the MIPI-CSI2 interface, it is strongly recommended to read the original text of the agreement. My key reference is the original text of the agreement : 2019-09-17_19.05.53_mipi_CSI-2_specification_v3-0.pdf

1. MIPI overview

The MIPI Alliance is an open membership organization. CSI (Camera Serial Interface) is an interface standard specified by the Camera Working Group under the MIPI Alliance. DSI is a display-related interface standard. In this article we focus on the MIPI-CSI2 protocol

Typical legend (D-PHY):

MIPI-CSI2:

CSI-2 is the second version of MIPI CSI. It is mainly composed of application layer, protocol layer and physical layer. It supports a maximum of 4 channels of data transmission, and the theoretical transmission speed of a single line is as high as 9Gb/s (the maximum value of different devices is inconsistent, and the maximum value of IMX8 series is 1.5Gb/s). s per lane)

Defines the interface between the camera peripheral and the host controller, aiming to determine the standard of the camera and the host controller in mobile applications. CSI-2 defines the interface between the sender (camera) and the receiver (soc) in the camera application The data and control transmission standard, its physical layer supports two kinds of DPHY and CPHY, we mainly take DPHY as an example

D-PHY: The CSI-2 camera interface at the physical layer consists of a clock line and one or more data lines

C-PHY: The CSI-2 camera interface at the physical layer consists of one or more channels, and each channel simultaneously transmits clock and data information

MODE:     Control/High-Speed/Escape/Ultra-Low Power State

4-lane block diagram of D-PHY MIPI-CSI/MIPI-DSI: This article focuses on D-PHY

Explanation of key terms:

Lane: A unidirectional, point-to-point, 2-wire or 3-wire interface for high-speed serial clock or data transmission, the CSI-2 camera interface using the D-PHY physical layer consists of 1 clock Lane and 1/2/4 Data Lane channel

Packet: A group of bytes organized in a specific way for transmitting data on an interface. All packets have a minimum size of data in bytes. A byte is the basic data unit of a packet.

Payload : Application data only, except for all syncs, headers, ECC and checksums and other protocol related information. This is the "core" for transfers between the application processor and peripherals

Virtual Channel : A specification that supports multiple independent data streams of up to 32 peripherals (camera). The data flow of each peripheral (camera) can be a virtual channel. These data streams may be interleaved as successive packets, each dedicated to a specific peripheral (camera) or channel. The packet protocol includes information that connects each packet to its intended peripheral device (it will be explained in the subsequent explanation of the packet protocol that each packet header contains the corresponding virtual id, and specific data types)

2. CSI-2 layered protocol

block diagram:

Application Layer:
This layer is mainly used for data processing in different scenarios. For the sender, the data is mostly generated by the camera, and for the receiver, the data is mostly processed by the SOC.

Protocol Layer:              organized as packets

1.Pixel/Byte Packing/Unpacking Layer:

Pixel/byte packing/decapsulating layer, CSI-2 specification supports image applications with different pixel formats, from 6 to 24 bits per pixel. In the sending direction: this layer packs the pixels of the application layer into bytes before sending the data to the lower protocol layer, and in the receiving direction: this layer parses the bytes from the lower protocol layer before sending the data to the application layer for pixels

2.Low Level Protocol (LLP):

Low-level protocol layer, establishes bit and byte-level synchronization between start-of-transfer (SoT) and end-of-transfer (EoT) events for serial data transmission, and passes data to the next layer, with a minimum data size of 1 byte, See Chapter 4 for details

3.Lane Management:

Lane channel management, in order to meet the bandwidth requirements in different scenarios, CSI-2 stipulates that the number of Lanes can be expanded. Therefore, when faced with simultaneous transmission of multiple Lanes, the sender needs to distribute the byte stream fairly (distributor), and the receiver needs to merge the data of multiple Lanes (merger). See Chapter 3 for details .

Note: The following chapters 3/4/5 will explain Lane Management/Low Level Protocol/Pixel Byte Packing Unpacking Layer in detail.

PHY Layer:

The PHY layer specifies the transmission medium, captures "0" and "1" from the serial bit stream at the electrical level, and simultaneously generates and captures signals such as SoT and EoT

3.Multi-Lane Distribution and Merging

Distribution block diagram: ignore, not focus on at present

merging block diagram:

The receiving order of 4 lanes:

note:

As can be seen from the above figure, when the SoT starts to signal at Lane 4, the csi2 protocol will wait until the 8 bits of each lane channel form a BYTE, and then assemble the bytes on each channel into the packet in order, and the subsequent LLP will Parse the corresponding package (the data in the package is not a formal multiple of 4 and does not affect the protocol)

4.Low Level Protocol

Low-level protocol (LLP) is a byte - based packet protocol that supports the transmission of arbitrary data using short packet/long packet format ( short packet / long packet )

  • Arbitrary data transfer (load independent)
  • 8-bit byte data size
  • Supports 16 crossed virtual lanes on the same D-PHY link
  • Special packets for start-of-frame, end-of-frame, start-of-line, and end-of-line information
  • Description data describing the type, pixel depth, and format of application-specific payload data
  • 16-bit checksum code for error detection
  • 6-bit error correction code for error detection and correction (D-PHY physical layer)

packet overview:

Packet protocol format:

 Long Packet Structure for D-PHY:                        data type : 0x10 - 0x17

note:

As shown in the figure above, the CV (bits 7:6) and NVX (bits 7:6) in the Data ID are used to form 4 bits to represent 16 virtual channels, and the data packets of different virtual channels will be sent to the corresponding channels

Short Packet Structure for D-PHY:                        data type : 0x00 - 0x0f

note:

If the short packet is used to indicate the frame synchronization signal, the data in the Data Field is the frame number

If the short packet is used to indicate the line synchronization signal, the data in the Data Field is the line number

Virtual channel processing:

 Examples of different data formats for virtual channels:

 Data types:

Packet Data Payload Size Rules:

YUV/RGB/RAW data type, a long packet should contain the data size of one line, so if the long packet data of the same data type in the same virtual channel should be the same size every time (in some cases, one line In order to meet some requirements, the data may bring some padding blank data)

Frame Format example:

5. Data packet details

CSI-2 supported fromats packet data size:

Bandwidth Calculation:

HTOT(1920) * VTOT(1080) * FPS(30) * Bits Per Pixel(16) / number of data lanes(4) = 1920*1080*30*16/4=248832000

Because the MIPI interface is a double date rate, it must be divided by 2,248832000/2=124,416,000 (HZ)

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Origin blog.csdn.net/kimginginging/article/details/127745726