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I/O hardware principle

I/O equipment

It can be roughly divided into two categories:

Block device: stores information in fixed-size blocks, each block has its own address, usually the size of the block is between 512 bytes and 65536 bytes, and all transmissions are in one or more complete (consecutive) blocks As a unit, each block can be read and written independently of other blocks. Hard disks, Blu-ray discs, and USB disks are the most common block devices.
Character device: Send or receive a character stream in units of characters, regardless of any block structure, character devices are not addressable, and most devices that are different from disks can be regarded as character devices, such as printers, network interfaces, and mice wait

There are also some other devices that are not included in these two categories, such as clocks, monitors, etc.

device controller

I/O devices generally consist of two parts: mechanical parts and electronic parts. The electronic parts are called device controllers or adapters, and the mechanical parts are the devices themselves. There is usually a connector on the controller card into which the cable leading to the device itself can be plugged into, and many controllers can operate 2, 4, or even 8 of the same device. There is usually a very low-level interface between the controller and the device. The task of the controller is to convert the serial bit stream into a byte block and perform the necessary rough even correction. The byte block is usually first inside the controller. Assembled in a buffer of bits, then the checksum is checked and the block of bytes is verified to be error-free before being copied to main memory.

memory-mapped I/O

Each controller has several registers that are used to communicate with the CPU. By writing to these registers, the operating system can command the device to send data, receive data, turn it on or off, or perform some other operation. By reading these registers, the operation The system can know whether the state of the device is ready to receive a new command, etc. Many devices also have a data buffer that the operating system can read and write, into which programs or the operating system can write data.

There are two ways for the CPU to communicate with the device's control registers and data buffers:

I/O port: Each control register is assigned an I/O port, all I/O ports form an I/O port space, and are protected so that only the operating system can access them
Memory-mapped I/O: All control registers are mapped to memory space, and each control register is assigned a unique memory address, and no memory is allocated to this address. Such a system becomes memory-mapped I/O. When the CPU wants to read a byte, whether it is read from the memory or an I/O port, it must put the required address on the address line of the bus, and then set it on a control line of the bus. Start a READ signal, and use the second signal line to indicate whether I/O space or memory space is needed. If it is memory space, the memory will respond to the request. If it is I/O space, the I/O device will respond. ask. If there was only memory space, then each memory module and each I/O device would compare the address line to the address range it served, and if the address fell within that range, it would honor the request.

direct memory access

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Regardless of whether a CPU has memory-mapped I/O or not, it needs to address device controllers in order to exchange data with them. A CPU can request data one byte at a time from an I/O controller, but doing so wastes CPU time, so A scheme called direct memory read is often used.

The CPU programs it by setting the registers of the DMA controller, so the DMA controller knows what data to transfer to where, and the DMA controller also sends a command to the disk controller to inform it to read data from the disk to its internal buffer , and verify the checksum. The DMA controller initiates a DMA transfer by issuing a read request on the bus to the disk controller. This read request looks like any other read request. The disk controller does not know or care whether it is from the CPU or the DMA controller. , in general, the memory address to be written is on the address line of the bus, so when the disk controller reads a word from its internal buffer, it knows where to write the word. Writing to memory is another standard bus cycle, and when the write operation is complete, the disk controller sends an acknowledge signal on the bus to the DMA controller. The DMA controller then increments the memory address to be used and decrements the byte count. If the byte count is still greater than 0, repeat steps 2 and 4 in the figure until the byte count reaches 0.

Many buses can operate in two modes: word-at-a-time mode and block mode. Some DMA controllers can also operate in both modes. In word mode, the DMA controller requests a word and gets it if The CPU also wants to use the bus, it has to wait, this mechanism is called cycle stealing, because the device controller occasionally sneaks in and steals a temporary bus cycle from the CPU, thus slightly delaying the CPU. In block mode, the DMA controller notifies the device to acquire the bus, initiates a series of transfers, and then releases the bus. This mode of operation is called burst mode, which is more efficient than cycle stealing, because acquiring the bus takes time and takes one time. The cost of being able to transmit multiple words. The disadvantage is that if a long burst transfer is in progress, it is possible to block the CPU and other devices for a considerable period of time.

I/O software principle

I/O Software Targets

A key concept when designing I/O software is device independence. For example, a program that uses a file as input should be able to read files on a hard disk, DVD, or USB disk without writing a dedicated program for each device. program.

I/O software design has several key goals:

Unified naming: closely related to device independence, the name of a file or a device should be a simple string or an integer, and should not depend on the device. For example, addressing by path name.
Error handling: In general, errors should be handled as close to the hardware as possible. When the controller finds a read error, it corrects itself if it can handle it, and if the controller cannot handle it, the device driver should handle it
Synchronous and asynchronous transmission: Most physical I/O is asynchronous, and after the CPU starts the transmission, it goes to do other work until an interrupt occurs
Buffering: After data leaves the device, it usually cannot be directly stored to its final destination, but must be placed in the output buffer.
Shared devices and exclusive devices: Some I/O devices (such as disks) can be used by multiple users at the same time, and it will not cause any problems for multiple users to open files on the same disk at the same time. Other devices, such as tape drives, must be used by a single user until that user runs out of use before another user can own the tape drive

I/O implementation

Program-controlled I/O: The simplest form of I/O is to let the CPU do all the work. For example, a user process wants to print a string of characters on a printer through a serial interface. First, the character data is copied to kernel space, and then the operating system Entering a loop, outputting one character at a time, the CPU constantly queries the device to see if it is ready to accept the next character, this behavior is called polling or busy waiting
Interrupt-driven I/O: During the process of printing characters, the CPU will be put on hold waiting, wasting time. Interrupts can be used to tell the CPU to do other things while it waits for the printer to become ready. When a system call to print a string is issued, the string buffer is copied to kernel space, and the received characters are copied to the printer. At this time, the CPU calls the scheduler to cause some other process to start running, and the process requesting to print will block. When the printer has finished printing the current character, it enters the ready state, and an interrupt will be generated, which will stop other processes being executed and save its state, and then continue the printer's process execution.
I/O using DMA: One obvious disadvantage of interrupt-driven I/O is that interrupts occur on every character, and interrupts take time, so this method will waste a certain amount of CPU time. The solution is to use DMA and let the DMA controller feed the printer one character at a time without bothering the CPU

Software Hierarchy of I/O