Problem Description
When using modelsim to compile the file, the following error message appears:
Solution
1. Select the file with the error message, right-click -> properties
2. After clicking to enter, find the "Verilog&Systemverilog" tab, click to enter and select "Include Directory" to prompt the error message during compilation to enter the folder where the required file is located. 3
. No error message generated when compiling again