Summary of 2022 Autumn Recruitment ASIC&FPGA Written Test Questions

1. Short answer questions

1. Setup time, hold time

build time setup time

        It refers to the minimum time Tsu that the data is stable before the rising edge of the clock signal of the flip-flop arrives.

hold up time hold up time

        It refers to the minimum time Th that the data is stable after the rising edge of the clock signal of the flip-flop arrives.

 

2. How to solve metastability and cross-clock domain processing of multiple clock domains