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USB speed identification
Connect a 15KΩ pull-down resistor to the ground on D+ and D- of each downstream facing port of the USB host or hub, so that when the port is idle (no device is plugged in), the input is blocked by two The pull-down resistor is pulled low. On the upstream facing port of the USB device, a 1.5KΩ pull-up resistor is connected to D+ or D- to the 3.3V power supply
| model | Pull-up resistor position (1.5KΩ) | speed |
|---|---|---|
| LS | D- | 1.5Mbits/s |
| FS | D+ | 12Mbits/s |
| HS | D+ | 480Mbits/s |
- Faster, the pull-up resistor is connected to D+
- Slow speed, the pull-up resistor is connected to D-
low speed equipment
full speed device
high speed equipment
For HS devices, it is first identified as FS devices, and then switches to high-speed mode after being confirmed by both the hub and the device.
So the high-speed device connection model is consistent with the full-speed device
In the high-speed mode, it is the current transmission mode, at this time, the pull-up resistor on D+ should be disconnected.
And on the D+ and D- lines, both the USB host and the USB device have an equivalent resistance to ground of 45 Ω
- When the high-speed device is initially connected to the host in full-speed mode, that is, a pull-up resistor is mounted on the D+ of the high-speed device. After the host detects that the device in full-speed mode is connected, it will reset the device (D+ and D- are low for a time > 10ms). After receiving the reset signal, the USB device working in the full speed mode will actively initiate the high speed mode handshake protocol for speed identification.
- If the host supports high-speed devices, it will interact with the device to complete the high-speed mode handshake protocol. At this time, the USB host and the USB device are both working in high-speed mode;
- If the host does not support high-speed devices, the handshake protocol will fail, and the device will not switch to high-speed mode. At this time, both the USB host and the USB device work in full-speed mode
- When a full-speed device is initially connected, because the device cannot initiate a handshake protocol in high-speed mode, eventually both the host and the device will work in full-speed mode.
reset
After the USB device is connected to the host, the host must reset the USB device at the first time, and the reset signal must last at least 10ms
The VOL(max) level is 0.3V. That is to say, to reset, D+ and D- must keep low level for more than 10ms.
It should be noted that the handshake protocol of the high-speed mode is completed during the reset process and completed before the end of the reset signal.
Both the USB host and the USB device must determine their own speed mode after reset.
High speed mode handshake process
Full speed J state
- When the high-speed USB device is connected to the USB host, due to the existence of the pull-up resistor at the beginning, D+ is high, so the bus state is in the full-speed J state. This is when the host will detect a full speed device connection.
SE0 state
- After the host connection detection is completed, the USB host sends a reset signal to make the bus in the SE0 state (D+ D- are both low). The USB device must initiate the high-speed mode handshake protocol within no less than 0.5us and no more than 3ms after detecting the SE0 state.
The device generates Chirp K
Before starting the handshake protocol, the device ensures that the pull-up resistor on its D+ line is loaded, and the 45Ω equivalent resistance to ground is not loaded.
Afterwards, the device side inputs a current of 17.78mA to D-, and the equivalent ground resistance of D- 45Ω on the host side is connected in parallel with the pull-down resistor 15K of the host. After parallel connection, the resistance is still about 45Ω, and an 800mV (17.78*45) voltage, which is Chirp Kthe signal . The Chirp K signal lasts at least 1ms and ends within 7ms after the start of the reset signal.
After the Chirp K signal of the device ends, the bus returns to the SE0 state (D+ D- are both low).
The SE0 signal indicates the end of the Chirp K signal of the device. When the host detects the SE0 signal, it considers that the Chirp K of the device is over, and then the host will send continuous KJ sequences.
Host generated KJ sequence
- If the duration of the Chirp K signal detected by the host is not less than 2.5us, the host considers the Chirp K valid.
- If the host cannot detect the Chirp K signal of the device, the host will drive the bus to SE0 until the end of the reset signal. After the high-speed mode handshake protocol ends, both the host and the device will work in full-speed mode.
The device is mounted with a high-speed terminal resistor
After detecting 3 pairs of valid KJ sequences at the device side, within 500us, the pull-up resistor of D+ must be removed, and a high-speed 45Ω equivalent resistance to ground must be mounted to enter high-speed mode. At this time, after the high-speed 45Ω equivalent ground resistance of the USB device is connected in parallel with the original 45Ω equivalent ground resistance of the host, the equivalent resistance becomes 22.5Ω, and the levels on the D+ and D- lines are about 400mv (17.78 *22.5). After that, the amplitude of the follow-up signal sequence sent by the host is about 400mV, which becomes a normal JK signal. So far, the entire high-speed mode handshake protocol is completed.
If the USB device cannot detect the 3 pairs of KJ signals, the device will return to the default state of full-speed mode within 1ms to 2.5ms after the USB device completes its own Chirp K signal, until the reset signal ends. Eventually both the USB host and the USB device will work in full speed mode.
idle state
Low Speed/Full Speed Devices
Connect a 15KΩ pull-down resistor to the ground on D+ and D- of each downstream facing port of the USB host or hub, so that when the USB device is connected to the USB host or hub, and the data line is not blocked When driving, due to the existence of the pull-up resistor on the data line, the corresponding data line voltage is higher than 2.8V, while the voltage on the other data line without a pull-up resistor is close to 0 V
This state is the static state at low speed/full speed, also known as the idle state
On low-speed devices, the idle state is when D+ is low and D- is high
On full-speed devices, the idle state is when D+ is high and D- is low
high speed equipment
In the high-speed mode, since the driving mode is current driving, D+ and D- will keep low level state without any driving of the USB data line.
SE0
single ended 0 (SE0): The state that occurs when both D+ and D- are logic low at the same time. This state indicates a reset, disconnect or end of packet.
- For low-speed/full-speed devices, the SE0 state is a state that occurs when both D+ and D- are logic low at the same time, and the idle state is a state where D+ and D- are 2.8V and one is 0V. These two state levels are different. of
- For high-speed devices, SE0 is the state that occurs when both D+ and D- are logic low at the same time, and the idle state is also when D+ and D- are both kept low, and these two levels are the same
SE1
single ended 1(SE1): The state that occurs when both D+ and D- are logic high at the same time. This state is not used in the USB protocol specification.