Disclaimer: The author is engaged in embedded software development, not a professional hardware designer. The content of the notes is output based on his own experience and understanding of the protocol. There must be some places where understanding and translation are not in place. If you have any questions, please refer to the original specification.
Global Operation Flow Diagram
图1 Data Lane Module State Diagram
图2 Clock Lane Module State Diagram
Data Rate Dependent Parameters (Informative)
The high-speed data transfer rate of the D-PHY can be programmed to a value specified by a particular implementation. Any independent data transmission prior to the SoT and Eot sequence, eg at a fixed rate. But reprogramming the data rate of D-PHY high-speed transmission is allowed at some points, these points include: at the time of initialization, before the exit process from the ULP state begins, or at any time when the HS clock is not running in the Stop state .
The values of many time parameters in the specification are specified as the sum of a fixed time and a specific number of high-speed UI (Unit Interval). If the data rate changes (and therefore the UI value), these parameters need to be recalculated. For these parameters and their allowed values, please refer to Table18 and Table19 of the specification, or the previous notes:
Parameters that contain only UI values
and is the minimum number of high-speed clock cycles that the Master must send on Clock Lane after the Master is restarted in HS mode and before any data transfer can begin. If there is a special agreement on the Slave side that requires more than or more cycles, then the agreement on the Master side must ensure that the requirements of the Slave are met.
Contains parameters for time and UI values
Some parameters are defined as the sum of an explicit time (explicit time) plus a UI number. Explicit timing generally comes from the time it takes to charge and discharge the interconnection circuit to a specified value given a specific drive voltage and line termination value. It is conceivable to use an analog timer (analog timer) plus a sum of HS clock counters to ensure that the implementation meets these parameters. If these explicit time values were implemented by only a few HS clock cycles, then the count value would be a function of the data rate, so these time values must be changed when the data rate changes.
It is measured from the time when Dn crosses , and is used to enable the time of Line termination of the Data Lane receiver.
is the time to drive LP-00 before starting HS transmission on Data Lane.
+ is the time to drive LP-00 during start-up to prepare for HS transmission, plus the time to send HS-0, i.e.: before sending the SoT Sync sequence, open the line termination and drive the interconnect circuit with the HS driver time.
is the time after the transmitter has sent the last payload data bit of an HS transmission burst, the transmitter must drive the bit after the last data bit is flipped.
is the time at which the receiver must "back up" and skip data, in order to ignore the switching period of the EoT sequence.
It is the minimum time for the transmitter to continue sending the HS clock after the last Data Lane switches to LP mode after an HS transmission burst. If a particular receiver implementation requires more than one clock cycle, then the transmitter must provide enough clocks to satisfy the receiver.
For ALP operations, there are similar parameters: , and . Additionally, some new parameters have been introduced, whose timings have both absolute and relative parts: , , and .
Parameters that contain only time values
Some parameters are only specified by explicit time values. As mentioned in the previous section, these explicit time values are generally derived from the time required to charge and discharge the interconnect and are therefore independent of the data rate. It is conceivable to use an analog timer or an HS clock counter to ensure that the implementation meets these parameters. But if these time values are only realized by counting HS clock cycles, the count value is a function of the data rate, so when the data rate changes, these values are also modified.
The parameters described in this section are as follows:
Parameters containing only time values relative to the data rate
The remaining parameters in Figure 1 (Table 18 of the specification) in the "Global Operaiton Timing Parameters" note are strictly observed even when the High-Speed clock is turned off. These parameters include Low-Power and initialization state maintenance time, and LP signaling intervals (LP signaling intervals). Although these parameters are independent of the HS data rate, some D-PHY implementations also require adjustments when the data rate changes.