Embedded study notes - PWM and input capture (on)

foreword

In the previous article, I mainly introduced some general-purpose timer content. This article mainly introduces the use process of output comparison and input capture, including its detailed structure and registers; the output capture uses the commonly used PWM as an example. Input capture takes capturing the time when a key is pressed as an example.

Output compare (PWM)

Let’s first take a look at the output comparison part. As mentioned earlier, the channel of the general-purpose timer has input capture, output comparison, PWM mode, and single pulse output mode. In essence, except for input capture, the other three belong to output comparison, all through Programming controls the specific time, period, cycle or single output of high and low levels, but the specific configuration of the output method is different; among them, PWM is the most commonly used control method, in motor control, LED adjustment, screen brightness, power supply voltage control, etc. and other neighborhoods have applications. So what is PWM?

Introduction to PWM

The name of PWM is pulse width modulation technology, which is a signal modulation technology commonly used in electronic circuits and control systems .
In practical applications, PWM is widely used in motor drive, lighting control, power supply voltage control and other fields. Because PWM technology can provide precise control, the quality of the output signal is more efficient and stable, and it also reduces system energy consumption and noise interference.
In fact, in layman's terms, PWM is a square wave signal that circulates all the time, but the cycle of this square wave signal and the time of high and low levels can be adjusted. It is precisely because of its periodicity that it is necessary to use a timer to To achieve, the essence of using a timer to operate PWM control is to operate the time of high and low levels.

Output Compare Detailed Block Diagram

In 15.3.4 Capture/Comparison Channel of the programming manual, there are detailed circuit diagrams about input and output. The main circuit diagram of channel 1 is shown below. The left side is the input capture part, and the right side is the output comparison part. Here, let’s look at the output first. comparatively partial.

If you observe carefully, you will find that the content of this block diagram should be incomplete. There is also an output controller in the output part of the previous article, which cannot be found in this diagram. In fact, it is not missing. It is just for the convenience of typesetting. Take a picture and find "Figure 146. The output stage of the capture/comparison channel (channel 1)", the corresponding circuit is the rest of the output, here the author directly splices the two, as shown in the following figure after splicing:

This circuit diagram is the actual block diagram of the output comparison. It is still an old rule, and it is introduced in blocks for better understanding.

1. Timer section

First of all, let’s look at the timer part. In fact, the configuration and block diagram of the timer part are the same as the previous basic timing. Here it is only more detailed. Compare the configuration process of the timer with the following figure: 1. Turn on the corresponding clock to
enable 2.
Perform time base configuration, including counter, prescaler and reload configuration; the
configuration of the counter is actually very simple, there is nothing to say, here is a little more about the working mode of the counter and comparator.

As shown in the figure above, the counter of the counter will be compared with the CCR1 of the comparator. Suppose we program the control and require that when the CNT of the counter is greater than CCR1, it will output a high level; when CNT<=CCR1, it will output a low level. This corresponds to At the IO port of the channel, we can see the output waveform of the IO logic on the right.
Similarly, we can also program to output high level when CNT is less than CCR1, and output low level when CNT is greater than or equal to CCR1. At this time, the output waveform of IO is as shown in the figure below: That is to say, when does GPIO

output The level can be programmed and controlled by us.

2. Comparator control section

The control part of the comparator is actually similar to the flow of the basic timer. Here we first look at the position of the red box in the figure below. Its output points between the comparison preload register and the comparison shadow register. This means that, It is up to him to control whether the value preloaded in the register is written to the shadow register and then the parameter has an effect on the counter.

1. To make the output of this AND gate true, the preload value can be written into the shadow register, then to make the output of the AND gate true, the following three inputs are required to be true;
2. Next, look at the three inputs behind the AND gate. The first is position 1. Before entering the AND gate, its output will have a negative to invert it. That is to say, if position 1 is non-zero, the first The input signal of the red box AND gate is 0, so it is impossible to write data, so what does position 1 represent? You can know it by querying the corresponding register, as shown in the figure below: You can find that this register is written into the
   
   preset If the value is loaded, the No. 1 position will output 1 when writing the CCR1 data, so that the AND gate in the red frame will be stuck to avoid writing wrong data into the shadow register; and the No. 1 position will output 0 after the writing is completed. At this time, the number 1 input red box and gate is true, and it can be written. For programmers, it is only necessary to assign a value to CCR1, and we do not need to judge to complete the writing.
3. Then there is the No. 2 position, here is a NOR gate, its logic is that if the input is all false, it will be true, if the input is true, then it will be true, that is to say, if this road wants to make the output of the AND gate in the red box be true , it is necessary to ensure that the value of the CC1S register is 0, so what does the value of this register represent? You
   can still search for it in the programming manual.
   
   It can be found that this register is used to select whether to configure as input mode or output mode. Since PWM is an output comparison, it must be configured as "00", which also makes the output of the NOR gate true, and then makes the second of the AND gate number is true.
   4. Finally, there is the third input of the AND gate in the red box, which is the position No. 3 in the figure. It can be seen that it is an OR gate with two inputs, and the above input is also marked with a NOT gate. Then if this OR gate wants to output true, it requires the upper input event to be false or the lower input to be true, so what do these two input events correspond to? Please refer to the programming manual, as shown in the figure below: first, OCIPE
   , This bit is to enable preloading, that is to say, you can control this bit to realize whether to enable preloading or not during programming.
   
   Then there is the following event, let's not look at it first, guess, since the last event is to enable or disable pre-loading, then there is another thing supporting this pre-loading - that is, when we used the basic timer earlier The update event that has been received; if the preload register is turned on, then if we want to actually write the data into the counter, we must manually generate an update time, so the last one must be the UEV related to the update event (update event).
   The configuration here generally turns on the preload register.

3. Output control part

After the counter and comparison, the output result will come to the output mode controller shown in the figure below. This part of the circuit is mainly to control the output mode, whether it is high effective or low effective, so how to control it specifically.

1. The first thing you need to look at is that there is a data selector in box 1. It should be noted here that there is a small problem in the original programming manual, which is the selection register of the selector. The register marked in the original picture cannot be found. The OC1CK of the modified TIMx_CCMR1 is described as follows:
   
   ETRF mentioned earlier is called external trigger input (ETRF). Since the PWM output process does not require external triggering, the default configuration is 0;
2. Then there is the OC1M corresponding to box 2. The corresponding position of this bit is also on CCMR1. It can be found that this register is divided into two parts. Among them, the first column above controls the output function, and the second column in the middle controls the input mode. They share a register.
   
   Regarding the role of OC1M, as shown in the figure below:
   
   These three bits are used to select the mode. Since we want to use PWM mode, we need to configure it as 110 or 111. Regarding PWM mode 1 and PWM mode 2, it is actually the above The difference in the active level mentioned is nothing more than when the counter is counting up:
   PWM mode 1 is active when CNT<CCR
   PWM mode 2 is active when CNT>CCR
   That is to say, these two modes, Complementary output waveforms are generated with all other configurations being equal.
3. Then there is the position of the red box No. 3. Here is another data selector, but the input signal is the same, but one of them has been reversed. Guess, this bit is used to control the output polarity. The specific description is as shown in the figure below
   . Note:
   
   This bit is used to control whether the output of Boxin is active high or low, so it should be noted that the above PWM mode also controls the high and low levels in the end, and this is also used to control the high and low levels in the configuration process. careful.
4. The last is the controller where the No. 4 box is located, the enable bit, set to 1 to enable the corresponding output.
   
   The process of output comparison needs to be configured:
   the output channel needs to be configured
   ① select the output mode
   ② compare the shadow register of the register
   ③ select the PWM mode
   ④ select the active level
   ⑤ output enable

Register Introduction

The above block diagram explanation has led to most of the registers. Here is a summary to pick out the registers that need to be used. There are still quite a lot of registers for general-purpose timing and advanced timers. The general-purpose timer has 20 registers. Of course, 20 registers are not required every time. You only need to configure the corresponding bits according to the corresponding functions. The registers that PWM needs to use are as follows:

1. Writing method of TIMx control register 1 (TIMx_CR1)
: TIMx->CR1
bit 0 CEN: counter enable
bit 1 UDIS: update disable (Update disable)
bit 2 URS: update request source (Update request source)
bit 3 OPM: single pulse Mode (One-pulse mode)
bit 4 DIR: Direction (Direction)
bit 7 ARPE: Auto-reload preload enable (Auto-reload preload enable)
bit 9:8 CKD: Clock division
input capture When it comes to sampling frequency

2. Writing method of TIMx status register (TIMx_SR)
: TIMx->SR
bit 0 UIF: Update interrupt flag (Update interrupt flag)
bit 1 CC1IF: Capture/compare 1 interrupt flag (Capture/compare 1 interrupt flag)

3. Writing method of TIMx event generation register (TIMx_EGR)
: TIMx->EGR
bit 0 UG: Update generation

4. TIMx capture/compare mode register 1 (TIMx_CCMR1)
writing method: TIMx->CCMR1
is used to configure channel 1 channel 2
bit 1:0 CC1S: capture/compare 1 selection (Capture/Compare 1 selection)
select input or output
bit 3 OC1PE : Output compare 1 preload enable (Output compare 1 preload enable)
comparison shadow register enable Bit
6:4 OC1M: Output compare 1 mode (Output compare 1 mode)
selects the corresponding output mode PWM1

5. TIMx capture/compare mode register 2 (TIMx_CCMR2)
writing method: TIMx->CCMR2
function is exactly the same as CCMR1 operation is channel 3 and channel 4

6. Writing method of TIMx capture/compare enable register (TIMx_CCER)
: TIMx->CCER
bit 0 CC1E: capture/compare 1 output enable (Capture/Compare 1 output enable).
Channel enable: set to 1 to enable
bit 1 CC1P: capture/compare 1 output polarity (Capture/Compare 1 output Polarity).
Configure the corresponding active level

7. TIMx capture/compare register 1 (TIMx_CCR1)
writing method: TIMx->CCR1
usage direct assignment
It is not difficult to find that in the whole configuration process, the time base configuration part is the same as the previous basic timer, just modify the name of the timer. The PWM function of general timing is only based on how to add some registers.

output comparison code

According to the above block diagram explanation and the introduction of the registers, summarize the configuration process of using the timer to output PWM:

pseudocode

PWM初始化配置
{
    
    
   //开始对应时钟  IO口  定时器

   GPIO的控制器
   //模式寄存器
   //复用功能寄存器   查映射表

   配置定时器的时基单元部分
   //更新禁制
   //更新请求源
   //单脉冲
   //方向
   //重装载值影子寄存器
   //预分频配置
   //重装载值配置
   //人为产生更新事件

   配置输出通道
   //通道配置成输出模式
   //比较寄存器的影子寄存器
   //配置PWM模式
   //配置输出的有效电平
   //通道使能

   //计数器使能   
}
//具体修改PWM输出的占空比，就是通过控制比较寄存器的值CCR来实现的
TIMx->CCR1=****;

actual code

First find the corresponding peripheral pins that need to be driven by PWM. Here I use PA6 and PA7. You can check them on the schematic diagram

and then look up the corresponding mapping number and corresponding timer channel in the pin mapping table, which are: AF2 , TIM3->CH1, TIM3->CH2;

and then the code: as follows:

/*******************************************
*函数名    :Time3_PWM_Init
*函数功能  :定时器三的PWM初始化配置
*函数参数  :u16 arr u16 psc
*函数返回值:无
*函数描述  :
PA6---------CH1
PA7---------CH2
*********************************************/
void Time3_PWM_Init(u16 psc,u16 arr )
{
    
    
	RCC->AHB1ENR |=(1<<0);//打开PA的时钟
	RCC->APB1ENR |=(1<<1); //打开Time3的时钟
	
	//GPIO的配置
	GPIOA->MODER &=~(0xf<<12);//清零
	GPIOA->MODER |= (0xa<<12);//复用模式
	
	GPIOA->AFR[0] &=~(0xf<<24);//清零
	GPIOA->AFR[0] |= (0x2<<24);//将PA6映射到Time3的通道1
	//GPIOA->AFR[0] &=~(0xf<<28);//清零
	GPIOA->AFR[0] &=~(0XF<<28); //清零
	GPIOA->AFR[0] |=(2<<28);    //将PA7复用到TIM3_CH1
	
/*-----------时基配置-----------------------------------------------------------------*/
	TIM3->CR1 &=~(0Xf<<1);	//更新禁止，更新请求源，关闭单脉冲，向上计数
	TIM3->CR1 |=(1<<7);     //重装载影子寄存器
	TIM3->SMCR &=~(7<<0);  //配置内部时钟
	TIM3->PSC = psc-1;
	TIM3->ARR = arr-1;
	TIM3->EGR |= (1<<0);//更新事件，写入预分频和重装载值
	
/*--------------通道部分-------------------------------------------------------------*/
//通道一
	TIM3->CCMR1 &=~ (3<<0);//配置为输出模式
	TIM3->CCMR1 |=(1<<3); //比较寄存器的影子寄存器
	TIM3->CCMR1 &=~(0X7<<4);
	TIM3->CCMR1 |=(0X6<<4);//PWM模式1
	
	TIM3->CCER |=(1<<1);//低电平有效
	TIM3->CCER |=(1<<0);//输出通道使能

//通道二
	TIM3->CCMR1 &=~ (3<<8);//配置为输出模式
	TIM3->CCMR1 |=(1<<11); //比较寄存器的影子寄存器
	TIM3->CCMR1 &=~(0X7<<12);
	TIM3->CCMR1 |=(0X6<<12);//PWM模式1
	
	TIM3->CCER |=(1<<5);//低电平有效
	TIM3->CCER |=(1<<4);//输出通道使能

	TIM3->CR1 |=(1<<0);     //计数器使能	
}

#ifndef _PWM_H
#define _PWM_H
#include "stm32f4xx.h"
#define Time_PWM_Duty1 TIM3->CCR1
#define Time_PWM_Duty2 TIM3->CCR2
void Time3_PWM_Init(u16 psc,u16 arr );
#endif

actual effect

Realize the breathing light effect of the two lights PA6 and PA7 on the board;
duty cycle control function:

/*******************************
函数名：TIM7_IRQHandler
函数功能：定时器7中断服务函数函数
函数形参：无
函数返回值：void
备注：1ms中断
********************************/
void TIM7_IRQHandler(void)
{
    
    
	static u8 LED_Flag=0;
	static u16 Time7_Cnt[10]; 
	if(TIM7->SR & (1<<0))
	{
    
    
		TIM7->SR &=~(1<<0);
		Time7_Cnt[0]++;
		Time7_Cnt[1]++;
		if(Time7_Cnt[0]>=500)
		{
    
    
			
			Time7_Cnt[0]=0;
		}
		if(Time7_Cnt[1]>2)
		{
    
    
			Time7_Cnt[1]=0;
			if(LED_Flag==0)//逐渐亮
			{
    
    		
				Time_PWM_Duty1++;
				Time_PWM_Duty2++;
				if(Time_PWM_Duty1>900)
				{
    
    
					LED_Flag=1;
					Time_PWM_Duty1=990;
					Time_PWM_Duty2=990;
				}
			}
			if(LED_Flag==1)//逐渐暗
				{
    
    
					Time_PWM_Duty1--;
					Time_PWM_Duty2--;
					if(Time_PWM_Duty1<50)
					{
    
    
						LED_Flag=0;
						Time_PWM_Duty1=10;
						Time_PWM_Duty2=10;
					}
				}
		}	
	}
}

Breathing light:

Summarize

So much is introduced about the PWM output of the output comparison mode. Since the length of the article affects the viewing experience, I will open a separate article on input capture and introduce it in the next article.