QuartusII Problem Summary
Using Quattus will encounter many Warnings. The hardware description language is different from C. Some Warnings are not allowed to exist, and some can be ignored. Do a summary of QuartusII Warnning.
Numbered QuartusII Warning:
1. Warning (10230): Verilog HDL assignment warning at v_led.v(13): truncated value with size 32 to match size of target (8) Reason: Verilog's default bit width is 32 bits, and you are using something like counter=counter+1; the following 1 does not give the data width to produce this error. Solution: Define the bit width of the data, such as counter=counter+8'd1; this warning can also be ignored.