The first RC version of QEMU 7.0 has been released, and the official version is planned to be launched in mid-April. QEMU 7.0 specifically adds support for Intel AMX, which helps Linux KVM support Intel Advanced Matrix Extensions, and is currently ready to be merged into the mainline. Version 7.0 has also done a lot of work on RISC-V architecture support, in addition to a number of other changes.
Major new features at a glance
- Improvements for ARM architecture: introduction of new mori -bmc board model, support for emulation of other functions , and improvements to virt board
- OpenRISC now supports up to 4 cores (previously 2 cores was the limit). OpenRISC code can now also automatically generate DeviceTree and pass it to the kernel
- Dropped support for PowerPC 401 / 403 / 601 / 602 CPUs
- QEMU Tiny Code Generator (TCG) no longer supports ARMv4 and ARMv5 hosts
- QEMU on RISC-V now supports approved Vector 1.0 extensions and other new extensions like Zve64f, Zve32f
- RISC-V KVM support that recently went upstream in the Linux kernel mainline is now backed by QEMU
- Improved QEMU for RISC-V: hypervisor extensions enabled by default and experimental support for 128-bit CPUs
- Add support for Intel AMX
- 9pfs code now supports macOS hosts
- HPPA target can now support up to 16 vCPUs
- QEMU 7.0 adds a "-display dbus" option to export the display of external processes using the gtk4-rs Rust based GTK4 viewer, this feature will be used in future versions of GNOME Boxes and virt-viewer
- Support for more flexible fleecing backups
- Support for Microsoft Windows 11 in "guest-get-osinfo" command